From 0ccb500fa7a28baeb66754ff4a6950fa0e82617d Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 31 Oct 2006 23:06:00 +0000 Subject: Compile CodeGen/PowerPC/fp-branch.ll to: _intcoord_cond_next55: LBB1_3: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 blt cr0, LBB1_2 ;cond_next62.exitStub LBB1_1: ;bb72.exitStub li r3, 1 blr LBB1_2: ;cond_next62.exitStub li r3, 0 blr instead of: _intcoord_cond_next55: LBB1_3: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 bge cr0, LBB1_1 ;bb72.exitStub LBB1_4: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 bnu cr0, LBB1_2 ;cond_next62.exitStub LBB1_1: ;bb72.exitStub li r3, 1 blr LBB1_2: ;cond_next62.exitStub li r3, 0 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 635455b..087e25b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -975,6 +975,15 @@ static bool ShouldEmitAsBranches(const std::vector &Cases) { if (Cases.size() != 2) return true; + // If this is two comparisons of the same values or'd or and'd together, they + // will get folded into a single comparison, so don't emit two blocks. + if ((Cases[0].CmpLHS == Cases[1].CmpLHS && + Cases[0].CmpRHS == Cases[1].CmpRHS) || + (Cases[0].CmpRHS == Cases[1].CmpLHS && + Cases[0].CmpLHS == Cases[1].CmpRHS)) { + return false; + } + return true; } @@ -1025,14 +1034,13 @@ void SelectionDAGLowering::visitBr(BranchInst &I) { (BOp->getOpcode() == Instruction::And || BOp->getOpcode() == Instruction::Or)) { FindMergedConditions(BOp, Succ0MBB, Succ1MBB, CurMBB, BOp->getOpcode()); - + // If the compares in later blocks need to use values not currently + // exported from this block, export them now. This block should always + // be the first entry. + assert(SwitchCases[0].ThisBB == CurMBB && "Unexpected lowering!"); + // Allow some cases to be rejected. if (ShouldEmitAsBranches(SwitchCases)) { - // If the compares in later blocks need to use values not currently - // exported from this block, export them now. This block should always - // be the first entry. - assert(SwitchCases[0].ThisBB == CurMBB && "Unexpected lowering!"); - for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i) { ExportFromCurrentBlock(SwitchCases[i].CmpLHS); ExportFromCurrentBlock(SwitchCases[i].CmpRHS); @@ -1044,6 +1052,11 @@ void SelectionDAGLowering::visitBr(BranchInst &I) { return; } + // Okay, we decided not to do this, remove any inserted MBB's and clear + // SwitchCases. + for (unsigned i = 1, e = SwitchCases.size(); i != e; ++i) + CurMBB->getParent()->getBasicBlockList().erase(SwitchCases[i].ThisBB); + SwitchCases.clear(); } } -- cgit v1.1