From 7e99a60857532ca2973cf9dabc790d84a2e15a8a Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Mon, 18 Jun 2012 19:45:50 +0000 Subject: ARM: Define generic HINT instruction. The NOP, WFE, WFI, SEV and YIELD instructions are all hints w/ a different immediate value in bits [7,0]. Define a generic HINT instruction and refactor NOP, WFI, WFI, SEV and YIELD to be assembly aliases of that. rdar://11600518 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158674 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.cpp | 3 +- lib/Target/ARM/ARMInstrInfo.td | 45 +++++++-------------------- lib/Target/ARM/ARMInstrThumb2.td | 27 +++++++--------- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 21 +++++++++++++ test/MC/ARM/basic-arm-instructions.s | 26 +++++++++++----- test/MC/ARM/basic-thumb2-instructions.s | 16 +++++++++- 6 files changed, 80 insertions(+), 58 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index b8f607e..31b0c41 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -31,7 +31,8 @@ ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) /// getNoopForMachoTarget - Return the noop instruction to use for a noop. void ARMInstrInfo::getNoopForMachoTarget(MCInst &NopInst) const { if (hasNOP()) { - NopInst.setOpcode(ARM::NOP); + NopInst.setOpcode(ARM::HINT); + NopInst.addOperand(MCOperand::CreateImm(0)); NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); NopInst.addOperand(MCOperand::CreateReg(0)); } else { diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 50ae826..5131152 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1585,33 +1585,18 @@ def ATOMCMPXCHG6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2), NoItinerary, []>; } -def NOP : AI<(outs), (ins), MiscFrm, NoItinerary, "nop", "", []>, - Requires<[IsARM, HasV6T2]> { - let Inst{27-16} = 0b001100100000; - let Inst{15-8} = 0b11110000; - let Inst{7-0} = 0b00000000; -} - -def YIELD : AI<(outs), (ins), MiscFrm, NoItinerary, "yield", "", []>, - Requires<[IsARM, HasV6T2]> { - let Inst{27-16} = 0b001100100000; - let Inst{15-8} = 0b11110000; - let Inst{7-0} = 0b00000001; +def HINT : AI<(outs), (ins imm0_255:$imm), MiscFrm, NoItinerary, + "hint", "\t$imm", []>, Requires<[IsARM, HasV6]> { + bits<8> imm; + let Inst{27-8} = 0b00110010000011110000; + let Inst{7-0} = imm; } -def WFE : AI<(outs), (ins), MiscFrm, NoItinerary, "wfe", "", []>, - Requires<[IsARM, HasV6T2]> { - let Inst{27-16} = 0b001100100000; - let Inst{15-8} = 0b11110000; - let Inst{7-0} = 0b00000010; -} - -def WFI : AI<(outs), (ins), MiscFrm, NoItinerary, "wfi", "", []>, - Requires<[IsARM, HasV6T2]> { - let Inst{27-16} = 0b001100100000; - let Inst{15-8} = 0b11110000; - let Inst{7-0} = 0b00000011; -} +def : InstAlias<"nop$p", (HINT 0, pred:$p)>, Requires<[IsARM, HasV6T2]>; +def : InstAlias<"yield$p", (HINT 1, pred:$p)>, Requires<[IsARM, HasV6T2]>; +def : InstAlias<"wfe$p", (HINT 2, pred:$p)>, Requires<[IsARM, HasV6T2]>; +def : InstAlias<"wfi$p", (HINT 3, pred:$p)>, Requires<[IsARM, HasV6T2]>; +def : InstAlias<"sev$p", (HINT 4, pred:$p)>, Requires<[IsARM, HasV6T2]>; def SEL : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm, NoItinerary, "sel", "\t$Rd, $Rn, $Rm", []>, Requires<[IsARM, HasV6]> { @@ -1624,18 +1609,10 @@ def SEL : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm, NoItinerary, "sel", let Inst{27-20} = 0b01101000; let Inst{7-4} = 0b1011; let Inst{11-8} = 0b1111; - let Unpredictable{11-8} = 0b1111; } -def SEV : AI<(outs), (ins), MiscFrm, NoItinerary, "sev", "", - []>, Requires<[IsARM, HasV6T2]> { - let Inst{27-16} = 0b001100100000; - let Inst{15-8} = 0b11110000; - let Inst{7-0} = 0b00000100; -} - -// The i32imm operand $val can be used by a debugger to store more information +// The 16-bit operand $val can be used by a debugger to store more information // about the breakpoint. def BKPT : AI<(outs), (ins imm0_65535:$val), MiscFrm, NoItinerary, "bkpt", "\t$val", []>, Requires<[IsARM]> { diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index d49b3ad..e780b8a 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -3457,21 +3457,18 @@ let imod = 0, iflags = 0, M = 1 in // A6.3.4 Branches and miscellaneous control // Table A6-14 Change Processor State, and hint instructions -class T2I_hint op7_0, string opc, string asm> - : T2I<(outs), (ins), NoItinerary, opc, asm, []> { - let Inst{31-20} = 0xf3a; - let Inst{19-16} = 0b1111; - let Inst{15-14} = 0b10; - let Inst{12} = 0; - let Inst{10-8} = 0b000; - let Inst{7-0} = op7_0; -} - -def t2NOP : T2I_hint<0b00000000, "nop", ".w">; -def t2YIELD : T2I_hint<0b00000001, "yield", ".w">; -def t2WFE : T2I_hint<0b00000010, "wfe", ".w">; -def t2WFI : T2I_hint<0b00000011, "wfi", ".w">; -def t2SEV : T2I_hint<0b00000100, "sev", ".w">; +def t2HINT : T2I<(outs), (ins imm0_255:$imm), NoItinerary, "hint", "\t$imm",[]>{ + bits<8> imm; + let Inst{31-8} = 0b111100111010111110000000; + let Inst{7-0} = imm; +} + +def : t2InstAlias<"hint$p.w $imm", (t2HINT imm0_255:$imm, pred:$p)>; +def : t2InstAlias<"nop$p.w", (t2HINT 0, pred:$p)>; +def : t2InstAlias<"yield$p.w", (t2HINT 1, pred:$p)>; +def : t2InstAlias<"wfe$p.w", (t2HINT 2, pred:$p)>; +def : t2InstAlias<"wfi$p.w", (t2HINT 3, pred:$p)>; +def : t2InstAlias<"sev$p.w", (t2HINT 4, pred:$p)>; def t2DBG : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "dbg", "\t$opt", []> { bits<4> opt; diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index f0c7453..2f6b1b0 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -52,6 +52,27 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) { unsigned Opcode = MI->getOpcode(); + // Check for HINT instructions w/ canonical names. + if (Opcode == ARM::HINT || Opcode == ARM::t2HINT) { + switch (MI->getOperand(0).getImm()) { + case 0: O << "\tnop"; break; + case 1: O << "\tyield"; break; + case 2: O << "\twfe"; break; + case 3: O << "\twfi"; break; + case 4: O << "\tsev"; break; + default: + // Anything else should just print normally. + printInstruction(MI, O); + printAnnotation(O, Annot); + return; + } + printPredicateOperand(MI, 1, O); + if (Opcode == ARM::t2HINT) + O << ".w"; + printAnnotation(O, Annot); + return; + } + // Check for MOVs and print canonical forms, instead. if (Opcode == ARM::MOVsr) { // FIXME: Thumb variants? diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 35acb65..0920d71 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -2711,10 +2711,22 @@ Lforward: wfilt yield yieldne - -@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] -@ CHECK: wfehi @ encoding: [0x02,0xf0,0x20,0x83] -@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] -@ CHECK: wfilt @ encoding: [0x03,0xf0,0x20,0xb3] -@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] -@ CHECK: yieldne @ encoding: [0x01,0xf0,0x20,0x13] + hint #5 + hint #4 + hint #3 + hint #2 + hint #1 + hint #0 + +@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] +@ CHECK: wfehi @ encoding: [0x02,0xf0,0x20,0x83] +@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] +@ CHECK: wfilt @ encoding: [0x03,0xf0,0x20,0xb3] +@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] +@ CHECK: yieldne @ encoding: [0x01,0xf0,0x20,0x13] +@ CHECK: hint #5 @ encoding: [0x05,0xf0,0x20,0xe3] +@ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3] +@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] +@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] +@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] +@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3] diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 2104be3..4cfe2f2 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -3369,7 +3369,7 @@ _func: @ CHECK: uxth.w r7, r8 @ encoding: [0x1f,0xfa,0x88,0xf7] @------------------------------------------------------------------------------ -@ WFE/WFI/YIELD +@ WFE/WFI/YIELD/HINT @------------------------------------------------------------------------------ wfe wfi @@ -3378,6 +3378,13 @@ _func: wfelt wfige yieldlt + hint #5 + hint.w #5 + hint.w #4 + hint #3 + hint #2 + hint #1 + hint #0 @ CHECK: wfe @ encoding: [0x20,0xbf] @ CHECK: wfi @ encoding: [0x30,0xbf] @@ -3386,6 +3393,13 @@ _func: @ CHECK: wfelt @ encoding: [0x20,0xbf] @ CHECK: wfige @ encoding: [0x30,0xbf] @ CHECK: yieldlt @ encoding: [0x10,0xbf] +@ CHECK: hint #5 @ encoding: [0xaf,0xf3,0x05,0x80] +@ CHECK: hint #5 @ encoding: [0xaf,0xf3,0x05,0x80] +@ CHECK: sev.w @ encoding: [0xaf,0xf3,0x04,0x80] +@ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] +@ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] +@ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80] +@ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80] @------------------------------------------------------------------------------ -- cgit v1.1