From 943beeb7476b521eebbfc29400cf95125ec5f660 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Sat, 30 Oct 2010 21:07:28 +0000 Subject: Validate HTML. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117847 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/TableGenFundamentals.html | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) (limited to 'docs/TableGenFundamentals.html') diff --git a/docs/TableGenFundamentals.html b/docs/TableGenFundamentals.html index 412dc74..2f0c4ae 100644 --- a/docs/TableGenFundamentals.html +++ b/docs/TableGenFundamentals.html @@ -423,7 +423,7 @@ class. This operation is analogous to $(foreach) in GNU make. 'c' otherwise.
!eq(a,b)
Integer one if string a is equal to string b, zero otherwise. This - only operates on string, int and bit objects. Use !cast to + only operates on string, int and bit objects. Use !cast<string> to compare other types of objects.
@@ -813,8 +813,7 @@ end-user to factor out commonality from the records.

apply, and one or more records to bind the values in. Here are some examples:

-
-
+
 let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in
   def RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>;
 
@@ -831,7 +830,6 @@ examples:

"call\t{*}$dst", []>; }
-

File-scope "let" expressions are often useful when a couple of definitions need to be added to several records, and the records do not otherwise need to be @@ -842,8 +840,7 @@ more ways to factor out commonality from the records, specially if using several levels of multiclass instanciations. This also avoids the need of using "let" expressions within subsequent records inside a multiclass.

-
-
+
 multiclass basic_r<bits<4> opc> {
   let Predicates = [HasSSE2] in {
     def rr : Instruction<opc, "rr">;
@@ -869,16 +866,17 @@ several levels of multiclass instanciations. This also avoids the need of using
 
 
 
+
+

Expressions used by code generator to describe instructions and isel patterns:

-
- +
(implicit a)
an implicitly defined physical register. This tells the dag instruction selection emitter the input pattern's extra definitions matches implicit physical register definitions.
- +
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