From 315f09f422a3c33a44e6d5c2a78f284a9304994d Mon Sep 17 00:00:00 2001
From: Justin Holewinski
Date: Tue, 4 Dec 2012 16:11:51 +0000
Subject: Update release notes for NVPTX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169280 91177308-0d34-0410-b5e6-96231b3b80d8
---
docs/ReleaseNotes.html | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
(limited to 'docs')
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html
index 31cb26c..957e79c 100644
--- a/docs/ReleaseNotes.html
+++ b/docs/ReleaseNotes.html
@@ -442,6 +442,8 @@ core and border computations, control overhead vs. code size)
- ...
+ - New NVPTX back-end (replacing existing PTX back-end) based on NVIDIA
+ sources
@@ -696,6 +698,27 @@ core and border computations, control overhead vs. code size)
+
+
+
+
The PTX back-end has been replaced by the NVPTX back-end, which is based on
+ the LLVM back-end used by NVIDIA in their CUDA (nvcc) and OpenCL compiler.
+ Some highlights include:
+
+ - Compatibility with PTX 3.1 and SM 3.5
+ - Support for NVVM intrinsics as defined in the NVIDIA Compiler SDK
+ - Full compatibility with old PTX back-end, with much greater coverage of
+ LLVM IR
+
+
+
Please submit any back-end bugs to the LLVM Bugzilla site.
+
+
+
+
+
@@ -805,7 +828,7 @@ to remove a dependency on Target.
Known problem areas include:
- - The CellSPU, MSP430, PTX and XCore backends are experimental.
+ - The CellSPU, MSP430, and XCore backends are experimental.
- The integrated assembler, disassembler, and JIT is not supported by
several targets. If an integrated assembler is not supported, then a
--
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