From 90fd797dc739319347861d4f3984bc8952ae9a29 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 6 Nov 2010 19:57:21 +0000
Subject: add (and document) the ability for alias results to have fixed
 physical registers.  Start moving fp comparison aliases to the .td file
 (which default to using %st1 if nothing is specified).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8
---
 docs/CodeGenerator.html | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

(limited to 'docs')

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index 376b91c..8eb43d5 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -1998,12 +1998,20 @@ def : InstAlias&lt;"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)&gt;;
 <p>This example also shows that tied operands are only listed once.  In the X86
 backend, XOR8rr has two input GR8's and one output GR8 (where an input is tied
 to the output).  InstAliases take a flattened operand list without duplicates
-for tied operands.  The result of an instruction alias can also use immediates,
-which are added as simple immediate operands in the result, for example:</p>
+for tied operands.  The result of an instruction alias can also use immediates
+and fixed physical registers which are added as simple immediate operands in the
+result, for example:</p>
 
 <div class="doc_code">
 <pre>
+// Fixed Immediate operand.
 def : InstAlias&lt;"aad", (AAD8i8 10)&gt;;
+
+// Fixed register operand.
+def : InstAlias&lt;"fcomi", (COM_FIr ST1)&gt;;
+
+// Simple alias.
+def : InstAlias&lt;"fcomi $reg", (COM_FIr RST:$reg)&gt;;
 </pre>
 </div>
 
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