From ab0b949e0e9de452f3b052b11634ab761e008b23 Mon Sep 17 00:00:00 2001 From: Andrew Lenharth Date: Thu, 21 Feb 2008 06:45:13 +0000 Subject: Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/LangRef.html | 175 +++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 174 insertions(+), 1 deletion(-) (limited to 'docs') diff --git a/docs/LangRef.html b/docs/LangRef.html index af88237..d09d348 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -206,7 +206,10 @@
  • Atomic intrinsics
      -
    1. llvm.memory_barrier
      2. +
    2. llvm.memory_barrier
      3. +
    3. llvm.atomic.lcs
      4. +
    4. llvm.atomic.las
      5. +
    5. llvm.atomic.swap
  • General intrinsics @@ -5339,6 +5342,176 @@ i1 <device> ) + +
    + 'llvm.atomic.lcs.*' Intrinsic +
    +
    +
    Syntax:
    +

    + This is an overloaded intrinsic. You can use llvm.atomic.lcs on any + integer bit width. Not all targets support all bit widths however.

    + +
    +declare i8 @llvm.atomic.lcs.i8( i8* <ptr>, i8 <cmp>, i8 <val> )
+declare i16 @llvm.atomic.lcs.i16( i16* <ptr>, i16 <cmp>, i16 <val> )
+declare i32 @llvm.atomic.lcs.i32( i32* <ptr>, i32 <cmp>, i32 <val> )
+declare i64 @llvm.atomic.lcs.i64( i64* <ptr>, i64 <cmp>, i64 <val> )
+
+
    +
    Overview:
    +

    + This loads a value in memory and compares it to a given value. If they are + equal, it stores a new value into the memory. +

    +
    Arguments:
    +

    + The llvm.atomic.lcs intrinsic takes three arguments. The result as + well as both cmp and val must be integer values with the + same bit width. The ptr argument must be a pointer to a value of + this integer type. While any bit width integer may be used, targets may only + lower representations they support in hardware. + +

    +
    Semantics:
    +

    + This entire intrinsic must be executed atomically. It first loads the value + in memory pointed to by ptr and compares it with the value + cmp. If they are equal, val is stored into the memory. The + loaded value is yielded in all cases. This provides the equivalent of an + atomic compare-and-swap operation within the SSA framework. +

    +
    Examples:
    + +
    +%ptr      = malloc i32
+            store i32 4, %ptr
+
+%val1     = add i32 4, 4
+%result1  = call i32 @llvm.atomic.lcs.i32( i32* %ptr, i32 4, %val1 )
+                                          ; yields {i32}:result1 = 4
+%stored1  = icmp eq i32 %result1, 4       ; yields {i1}:stored1 = true
+%memval1  = load i32* %ptr                ; yields {i32}:memval1 = 8
+
+%val2     = add i32 1, 1
+%result2  = call i32 @llvm.atomic.lcs.i32( i32* %ptr, i32 5, %val2 )
+                                          ; yields {i32}:result2 = 8
+%stored2  = icmp eq i32 %result2, 5       ; yields {i1}:stored2 = false
+
+%memval2  = load i32* %ptr                ; yields {i32}:memval2 = 8
+
    +
    + + +
    + 'llvm.atomic.swap.*' Intrinsic +
    +
    +
    Syntax:
    + +

    + This is an overloaded intrinsic. You can use llvm.atomic.swap on any + integer bit width. Not all targets support all bit widths however.

    +
    +declare i8 @llvm.atomic.swap.i8( i8* <ptr>, i8 <val> )
+declare i16 @llvm.atomic.swap.i16( i16* <ptr>, i16 <val> )
+declare i32 @llvm.atomic.swap.i32( i32* <ptr>, i32 <val> )
+declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> )
+
+
    +
    Overview:
    +

    + This intrinsic loads the value stored in memory at ptr and yields + the value from memory. It then stores the value in val in the memory + at ptr. +

    +
    Arguments:
    + +

    + The llvm.atomic.ls intrinsic takes two arguments. Both the + val argument and the result must be integers of the same bit width. + The first argument, ptr, must be a pointer to a value of this + integer type. The targets may only lower integer representations they + support. +

    +
    Semantics:
    +

    + This intrinsic loads the value pointed to by ptr, yields it, and + stores val back into ptr atomically. This provides the + equivalent of an atomic swap operation within the SSA framework. + +

    +
    Examples:
    +
    +%ptr      = malloc i32
+            store i32 4, %ptr
+
+%val1     = add i32 4, 4
+%result1  = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val1 )
+                                        ; yields {i32}:result1 = 4
+%stored1  = icmp eq i32 %result1, 4     ; yields {i1}:stored1 = true
+%memval1  = load i32* %ptr              ; yields {i32}:memval1 = 8
+
+%val2     = add i32 1, 1
+%result2  = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val2 )
+                                        ; yields {i32}:result2 = 8
+
+%stored2  = icmp eq i32 %result2, 8     ; yields {i1}:stored2 = true
+%memval2  = load i32* %ptr              ; yields {i32}:memval2 = 2
+
    +
    + + +
    + 'llvm.atomic.las.*' Intrinsic + +
    +
    +
    Syntax:
    +

    + This is an overloaded intrinsic. You can use llvm.atomic.las on any + integer bit width. Not all targets support all bit widths however.

    +
    +declare i8 @llvm.atomic.las.i8.( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.las.i16.( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.las.i32.( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.las.i64.( i64* <ptr>, i64 <delta> )
+
+
    +
    Overview:
    +

    + This intrinsic adds delta to the value stored in memory at + ptr. It yields the original value at ptr. +

    +
    Arguments:
    +

    + + The intrinsic takes two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +

    +
    Semantics:
    +

    + This intrinsic does a series of operations atomically. It first loads the + value stored at ptr. It then adds delta, stores the result + to ptr. It yields the original value stored at ptr. +

    + +
    Examples:
    +
    +%ptr      = malloc i32
+        store i32 4, %ptr
+%result1  = call i32 @llvm.atomic.las.i32( i32* %ptr, i32 4 )
+                                ; yields {i32}:result1 = 4
+%result2  = call i32 @llvm.atomic.las.i32( i32* %ptr, i32 2 )
+                                ; yields {i32}:result2 = 8
+%result3  = call i32 @llvm.atomic.las.i32( i32* %ptr, i32 5 )
+                                ; yields {i32}:result3 = 10
+%memval   = load i32* %ptr      ; yields {i32}:memval1 = 15
+
    +
    +
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