From ce3ac89e28b77bb0b3028cf78ba302c14dcac0cd Mon Sep 17 00:00:00 2001 From: Mon P Wang Date: Wed, 30 Jul 2008 04:36:53 +0000 Subject: Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/LangRef.html | 147 ++++++++++++++++++++++++++++-------------------------- 1 file changed, 75 insertions(+), 72 deletions(-) (limited to 'docs') diff --git a/docs/LangRef.html b/docs/LangRef.html index 1ee7f29..06b8868 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -5788,14 +5788,15 @@ i1 <device> )
Syntax:

- This is an overloaded intrinsic. You can use llvm.atomic.cmp.swap on any - integer bit width. Not all targets support all bit widths however.

+ This is an overloaded intrinsic. You can use llvm.atomic.cmp.swap on + any integer bit width and for different address spaces. Not all targets + support all bit widths however.

-declare i8 @llvm.atomic.cmp.swap.i8( i8* <ptr>, i8 <cmp>, i8 <val> )
-declare i16 @llvm.atomic.cmp.swap.i16( i16* <ptr>, i16 <cmp>, i16 <val> )
-declare i32 @llvm.atomic.cmp.swap.i32( i32* <ptr>, i32 <cmp>, i32 <val> )
-declare i64 @llvm.atomic.cmp.swap.i64( i64* <ptr>, i64 <cmp>, i64 <val> )
+declare i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* <ptr>, i8 <cmp>, i8 <val> )
+declare i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* <ptr>, i16 <cmp>, i16 <val> )
+declare i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* <ptr>, i32 <cmp>, i32 <val> )
+declare i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* <ptr>, i64 <cmp>, i64 <val> )
Overview:
@@ -5827,13 +5828,13 @@ declare i64 @llvm.atomic.cmp.swap.i64( i64* <ptr>, i64 <cmp>, i64 &l store i32 4, %ptr %val1 = add i32 4, 4 -%result1 = call i32 @llvm.atomic.cmp.swap.i32( i32* %ptr, i32 4, %val1 ) +%result1 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 4, %val1 ) ; yields {i32}:result1 = 4 %stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true %memval1 = load i32* %ptr ; yields {i32}:memval1 = 8 %val2 = add i32 1, 1 -%result2 = call i32 @llvm.atomic.cmp.swap.i32( i32* %ptr, i32 5, %val2 ) +%result2 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 5, %val2 ) ; yields {i32}:result2 = 8 %stored2 = icmp eq i32 %result2, 5 ; yields {i1}:stored2 = false @@ -5852,10 +5853,10 @@ declare i64 @llvm.atomic.cmp.swap.i64( i64* <ptr>, i64 <cmp>, i64 &l This is an overloaded intrinsic. You can use llvm.atomic.swap on any integer bit width. Not all targets support all bit widths however.

-declare i8 @llvm.atomic.swap.i8( i8* <ptr>, i8 <val> )
-declare i16 @llvm.atomic.swap.i16( i16* <ptr>, i16 <val> )
-declare i32 @llvm.atomic.swap.i32( i32* <ptr>, i32 <val> )
-declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> )
+declare i8 @llvm.atomic.swap.i8.p0i8( i8* <ptr>, i8 <val> )
+declare i16 @llvm.atomic.swap.i16.p0i16( i16* <ptr>, i16 <val> )
+declare i32 @llvm.atomic.swap.i32.p0i32( i32* <ptr>, i32 <val> )
+declare i64 @llvm.atomic.swap.i64.p0i64( i64* <ptr>, i64 <val> )
Overview:
@@ -5886,13 +5887,13 @@ declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> ) store i32 4, %ptr %val1 = add i32 4, 4 -%result1 = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val1 ) +%result1 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val1 ) ; yields {i32}:result1 = 4 %stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true %memval1 = load i32* %ptr ; yields {i32}:memval1 = 8 %val2 = add i32 1, 1 -%result2 = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val2 ) +%result2 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val2 ) ; yields {i32}:result2 = 8 %stored2 = icmp eq i32 %result2, 8 ; yields {i1}:stored2 = true @@ -5911,10 +5912,10 @@ declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> ) This is an overloaded intrinsic. You can use llvm.atomic.load.add on any integer bit width. Not all targets support all bit widths however.

-declare i8 @llvm.atomic.load.add.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.add.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.add.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.add.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.add.i8..p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.add.i16..p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.add.i32..p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.add.i64..p0i64( i64* <ptr>, i64 <delta> )
Overview:
@@ -5941,11 +5942,11 @@ declare i64 @llvm.atomic.load.add.i64.( i64* <ptr>, i64 <delta> ) 
 %ptr      = malloc i32
         store i32 4, %ptr
-%result1  = call i32 @llvm.atomic.load.add.i32( i32* %ptr, i32 4 )
+%result1  = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 4 )
                                 ; yields {i32}:result1 = 4
-%result2  = call i32 @llvm.atomic.load.add.i32( i32* %ptr, i32 2 )
+%result2  = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 2 )
                                 ; yields {i32}:result2 = 8
-%result3  = call i32 @llvm.atomic.load.add.i32( i32* %ptr, i32 5 )
+%result3  = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 5 )
                                 ; yields {i32}:result3 = 10
 %memval1  = load i32* %ptr      ; yields {i32}:memval1 = 15
@@ -5960,12 +5961,13 @@ declare i64 @llvm.atomic.load.add.i64.( i64* <ptr>, i64 <delta> )
Syntax:

This is an overloaded intrinsic. You can use llvm.atomic.load.sub on - any integer bit width. Not all targets support all bit widths however.

+ any integer bit width and for different address spaces. Not all targets + support all bit widths however.

-declare i8 @llvm.atomic.load.sub.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.sub.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.sub.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.sub.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.sub.i8.p0i32( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.sub.i16.p0i32( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.sub.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.sub.i64.p0i32( i64* <ptr>, i64 <delta> )
Overview:
@@ -5992,11 +5994,11 @@ declare i64 @llvm.atomic.load.sub.i64.( i64* <ptr>, i64 <delta> ) 
 %ptr      = malloc i32
         store i32 8, %ptr
-%result1  = call i32 @llvm.atomic.load.sub.i32( i32* %ptr, i32 4 )
+%result1  = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 4 )
                                 ; yields {i32}:result1 = 8
-%result2  = call i32 @llvm.atomic.load.sub.i32( i32* %ptr, i32 2 )
+%result2  = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 2 )
                                 ; yields {i32}:result2 = 4
-%result3  = call i32 @llvm.atomic.load.sub.i32( i32* %ptr, i32 5 )
+%result3  = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 5 )
                                 ; yields {i32}:result3 = 2
 %memval1  = load i32* %ptr      ; yields {i32}:memval1 = -3
@@ -6015,37 +6017,37 @@ declare i64 @llvm.atomic.load.sub.i64.( i64* <ptr>, i64 <delta> )

These are overloaded intrinsics. You can use llvm.atomic.load_and, llvm.atomic.load_nand, llvm.atomic.load_or, and - llvm.atomic.load_xor on any integer bit width. Not all targets - support all bit widths however.

+ llvm.atomic.load_xor on any integer bit width and for different + address spaces. Not all targets support all bit widths however.

-declare i8 @llvm.atomic.load.and.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.and.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.and.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.and.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.and.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.and.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.and.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.and.i64.p0i64( i64* <ptr>, i64 <delta> )
 
 
-declare i8 @llvm.atomic.load.or.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.or.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.or.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.or.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.or.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.or.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.or.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.or.i64.p0i64( i64* <ptr>, i64 <delta> )
 
 
-declare i8 @llvm.atomic.load.nand.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.nand.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.nand.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.nand.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.nand.i8.p0i32( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.nand.i16.p0i32( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.nand.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.nand.i64.p0i32( i64* <ptr>, i64 <delta> )
 
 
-declare i8 @llvm.atomic.load.xor.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.xor.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.xor.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.xor.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.xor.i8.p0i32( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.xor.i16.p0i32( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.xor.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.xor.i64.p0i32( i64* <ptr>, i64 <delta> )
Overview:
@@ -6074,13 +6076,13 @@ declare i64 @llvm.atomic.load.xor.i64.( i64* <ptr>, i64 <delta> ) 
 %ptr      = malloc i32
         store i32 0x0F0F, %ptr
-%result0  = call i32 @llvm.atomic.load.nand.i32( i32* %ptr, i32 0xFF )
+%result0  = call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %ptr, i32 0xFF )
                                 ; yields {i32}:result0 = 0x0F0F
-%result1  = call i32 @llvm.atomic.load.and.i32( i32* %ptr, i32 0xFF )
+%result1  = call i32 @llvm.atomic.load.and.i32.p0i32( i32* %ptr, i32 0xFF )
                                 ; yields {i32}:result1 = 0xFFFFFFF0
-%result2  = call i32 @llvm.atomic.load.or.i32( i32* %ptr, i32 0F )
+%result2  = call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ptr, i32 0F )
                                 ; yields {i32}:result2 = 0xF0
-%result3  = call i32 @llvm.atomic.load.xor.i32( i32* %ptr, i32 0F )
+%result3  = call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %ptr, i32 0F )
                                 ; yields {i32}:result3 = FF
 %memval1  = load i32* %ptr      ; yields {i32}:memval1 = F0
@@ -6100,37 +6102,38 @@ declare i64 @llvm.atomic.load.xor.i64.( i64* <ptr>, i64 <delta> )

These are overloaded intrinsics. You can use llvm.atomic.load_max, llvm.atomic.load_min, llvm.atomic.load_umax, and - llvm.atomic.load_umin on any integer bit width. Not all targets + llvm.atomic.load_umin on any integer bit width and for different + address spaces. Not all targets support all bit widths however.

-declare i8 @llvm.atomic.load.max.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.max.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.max.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.max.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.max.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.max.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.max.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.max.i64.p0i64( i64* <ptr>, i64 <delta> )
 
 
-declare i8 @llvm.atomic.load.min.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.min.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.min.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.min.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.min.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.min.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.min.i32..p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.min.i64..p0i64( i64* <ptr>, i64 <delta> )
 
 
-declare i8 @llvm.atomic.load.umax.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.umax.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.umax.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.umax.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.umax.i8.p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.umax.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.umax.i32.p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.umax.i64.p0i64( i64* <ptr>, i64 <delta> )
 
 
-declare i8 @llvm.atomic.load.umin.i8.( i8* <ptr>, i8 <delta> )
-declare i16 @llvm.atomic.load.umin.i16.( i16* <ptr>, i16 <delta> )
-declare i32 @llvm.atomic.load.umin.i32.( i32* <ptr>, i32 <delta> )
-declare i64 @llvm.atomic.load.umin.i64.( i64* <ptr>, i64 <delta> )
+declare i8 @llvm.atomic.load.umin.i8..p0i8( i8* <ptr>, i8 <delta> )
+declare i16 @llvm.atomic.load.umin.i16.p0i16( i16* <ptr>, i16 <delta> )
+declare i32 @llvm.atomic.load.umin.i32..p0i32( i32* <ptr>, i32 <delta> )
+declare i64 @llvm.atomic.load.umin.i64..p0i64( i64* <ptr>, i64 <delta> )
Overview:
@@ -6159,13 +6162,13 @@ declare i64 @llvm.atomic.load.umin.i64.( i64* <ptr>, i64 <delta> ) 
 %ptr      = malloc i32
         store i32 7, %ptr
-%result0  = call i32 @llvm.atomic.load.min.i32( i32* %ptr, i32 -2 )
+%result0  = call i32 @llvm.atomic.load.min.i32.p0i32( i32* %ptr, i32 -2 )
                                 ; yields {i32}:result0 = 7
-%result1  = call i32 @llvm.atomic.load.max.i32( i32* %ptr, i32 8 )
+%result1  = call i32 @llvm.atomic.load.max.i32.p0i32( i32* %ptr, i32 8 )
                                 ; yields {i32}:result1 = -2
-%result2  = call i32 @llvm.atomic.load.umin.i32( i32* %ptr, i32 10 )
+%result2  = call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %ptr, i32 10 )
                                 ; yields {i32}:result2 = 8
-%result3  = call i32 @llvm.atomic.load.umax.i32( i32* %ptr, i32 30 )
+%result3  = call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %ptr, i32 30 )
                                 ; yields {i32}:result3 = 8
 %memval1  = load i32* %ptr      ; yields {i32}:memval1 = 30
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