From d04ec0c855176ebddd459c044bdd24f49938fae4 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Fri, 9 Mar 2012 00:52:20 +0000 Subject: misched: allow the default scheduler to be one chosen by the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152360 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineScheduler.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/llvm/CodeGen/MachineScheduler.h b/include/llvm/CodeGen/MachineScheduler.h index aded11f..e852009 100644 --- a/include/llvm/CodeGen/MachineScheduler.h +++ b/include/llvm/CodeGen/MachineScheduler.h @@ -15,8 +15,12 @@ // return new CustomMachineScheduler(C); // } // static MachineSchedRegistry -// SchedDefaultRegistry("custom", "Run my target's custom scheduler", -// createCustomMachineSched); +// SchedCustomRegistry("custom", "Run my target's custom scheduler", +// createCustomMachineSched); +// +// Inside PassConfig: +// enablePass(MachineSchedulerID); +// MachineSchedRegistry::setDefault(createCustomMachineSched); // //===----------------------------------------------------------------------===// @@ -39,10 +43,11 @@ struct MachineSchedContext { MachineFunction *MF; const MachineLoopInfo *MLI; const MachineDominatorTree *MDT; + const TargetPassConfig *PassConfig; AliasAnalysis *AA; LiveIntervals *LIS; - MachineSchedContext(): MF(0), MLI(0), MDT(0), AA(0), LIS(0) {} + MachineSchedContext(): MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {} }; /// MachineSchedRegistry provides a selection of available machine instruction -- cgit v1.1