From 58edd785018b91f0e01739218a3e6a057ab836a8 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 15 Nov 2007 08:13:29 +0000 Subject: Fix a thinko in post-allocation coalescer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44166 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LiveIntervalAnalysis.cpp | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'lib/CodeGen/LiveIntervalAnalysis.cpp') diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 833868a..55094e3 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -168,15 +168,22 @@ bool LiveIntervals::conflictsWithPhysRegDef(const LiveInterval &li, if (index == end) break; MachineInstr *MI = getInstructionFromIndex(index); + unsigned SrcReg, DstReg; + if (tii_->isMoveInstr(*MI, SrcReg, DstReg)) + if (SrcReg == li.reg || DstReg == li.reg) + continue; for (unsigned i = 0; i != MI->getNumOperands(); ++i) { MachineOperand& mop = MI->getOperand(i); - if (!mop.isRegister() || !mop.isDef()) + if (!mop.isRegister()) continue; unsigned PhysReg = mop.getReg(); - if (PhysReg == 0) + if (PhysReg == 0 || PhysReg == li.reg) continue; - if (MRegisterInfo::isVirtualRegister(PhysReg)) + if (MRegisterInfo::isVirtualRegister(PhysReg)) { + if (!vrm.hasPhys(PhysReg)) + continue; PhysReg = vrm.getPhys(PhysReg); + } if (PhysReg && mri_->regsOverlap(PhysReg, reg)) return true; } -- cgit v1.1