From a72dfb522da3f5a3c01fc4b1613565aa439d566d Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 5 Aug 2009 01:57:22 +0000 Subject: One more place where subreg lowering forgot to transfer undefness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78144 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LowerSubregs.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'lib/CodeGen/LowerSubregs.cpp') diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index e9e60a0..358aa16 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -242,9 +242,12 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { // No need to insert an identity copy instruction. If the SrcReg was // , we need to make sure it is alive by inserting an IMPLICIT_DEF if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) { - BuildMI(*MBB, MI, MI->getDebugLoc(), - TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg) - .addReg(InsReg, RegState::ImplicitKill); + MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), + TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg); + if (MI->getOperand(2).isUndef()) + MIB.addReg(InsReg, RegState::Implicit | RegState::Undef); + else + MIB.addReg(InsReg, RegState::ImplicitKill); } else { DOUT << "subreg: eliminated!\n"; MBB->erase(MI); -- cgit v1.1