From 9446407963005f3edfa8ac70e265c81839a416c9 Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Wed, 24 Sep 2008 01:07:17 +0000 Subject: Next round of earlyclobber handling. Approach the RA problem by expanding the live interval of an earlyclobber def back one slot. Remove overlap-earlyclobber throughout. Remove earlyclobber bits and their handling from live internals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineInstr.cpp | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'lib/CodeGen/MachineInstr.cpp') diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 7d44d4e..4db02f4 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -109,7 +109,6 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, // register's use/def lists. if (isRegister()) { assert(!isEarlyClobber()); - assert(!isEarlyClobber() && !overlapsEarlyClobber()); setReg(Reg); } else { // Otherwise, change this to a register and set the reg#. @@ -129,7 +128,6 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, IsKill = isKill; IsDead = isDead; IsEarlyClobber = false; - OverlapsEarlyClobber = false; SubReg = 0; } @@ -185,14 +183,9 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const { OS << "%mreg" << getReg(); } - if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber() || - overlapsEarlyClobber()) { + if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber()) { OS << "<"; bool NeedComma = false; - if (overlapsEarlyClobber()) { - NeedComma = true; - OS << "overlapsearly"; - } if (isImplicit()) { if (NeedComma) OS << ","; OS << (isDef() ? "imp-def" : "imp-use"); -- cgit v1.1