From 800e57313e19a30749ca59ed03f33583ffff4a3a Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Tue, 16 Nov 2010 01:58:21 +0000 Subject: Make the verifier a little quieter on instructions that it's probably (and likely) wrong about anyhow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119320 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 8ada60a..47a94b3 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -558,7 +558,9 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { else if (MO->isImplicit()) report("Explicit definition marked as implicit", MO, MONum); } else if (MONum < TI.getNumOperands()) { - if (MO->isReg()) { + // Don't check if it's a variadic instruction. See, e.g., LDM_RET in the arm + // back end. + if (MO->isReg() && MONum != TI.getNumOperands()-1) { if (MO->isDef()) report("Explicit operand marked as def", MO, MONum); if (MO->isImplicit()) -- cgit v1.1 From 113a06cff443f5d73c4f1f89bd31b0efb4222227 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Wed, 17 Nov 2010 00:55:36 +0000 Subject: Only avoid the check if we're the last operand before the variable operands in a variadic instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119446 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 47a94b3..f92b7fe 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -558,9 +558,9 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { else if (MO->isImplicit()) report("Explicit definition marked as implicit", MO, MONum); } else if (MONum < TI.getNumOperands()) { - // Don't check if it's a variadic instruction. See, e.g., LDM_RET in the arm - // back end. - if (MO->isReg() && MONum != TI.getNumOperands()-1) { + // Don't check if it's the last operand in a variadic instruction. See, + // e.g., LDM_RET in the arm back end. + if (MO->isReg() && !(TI.isVariadic() && MONum == TI.getNumOperands()-1)) { if (MO->isDef()) report("Explicit operand marked as def", MO, MONum); if (MO->isImplicit()) -- cgit v1.1 From 2f3a4aa550f8f196a546f7957b2df944e04404a2 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 17 Dec 2010 19:18:41 +0000 Subject: Allow missing kill flags on an untied operand of a two-address instruction when the operand uses the same register as a tied operand: %r1 = add %r1, %r1 If add were a three-address instruction, kill flags would be required on at least one of the uses. Since it is a two-address instruction, the tied use operand must not have a kill flag. This change makes the kill flag on the untied use operand optional. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122082 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index f92b7fe..1e2b478 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -625,7 +625,12 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { *OS << UseIdx << " is not live in " << LI << '\n'; } // Verify isKill == LI.killedAt. - if (!MI->isRegTiedToDefOperand(MONum)) { + // Two-address instrs don't have kill flags on the tied operands, and + // we even allow + // %r1 = add %r1, %r1 + // without a kill flag on the untied operand. + // MI->findRegisterUseOperandIdx finds the first operand using reg. + if (!MI->isRegTiedToDefOperand(MI->findRegisterUseOperandIdx(Reg))) { // MI could kill register without a kill flag on MO. bool miKill = MI->killsRegister(Reg); bool liKill = LI.killedAt(UseIdx.getDefIndex()); -- cgit v1.1 From 89cab93fe999f6d81b4b99a71ac797b7ecfec277 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 18 Dec 2010 00:06:56 +0000 Subject: Pass a Banner argument to the machine code verifier both from createMachineVerifierPass and MachineFunction::verify. The banner is printed before the machine code dump, just like the printer pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122113 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 1e2b478..1007d8e 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -46,14 +46,16 @@ using namespace llvm; namespace { struct MachineVerifier { - MachineVerifier(Pass *pass) : + MachineVerifier(Pass *pass, const char *b) : PASS(pass), + Banner(b), OutFileName(getenv("LLVM_VERIFY_MACHINEINSTRS")) {} bool runOnMachineFunction(MachineFunction &MF); Pass *const PASS; + const char *Banner; const char *const OutFileName; raw_ostream *OS; const MachineFunction *MF; @@ -196,9 +198,10 @@ namespace { struct MachineVerifierPass : public MachineFunctionPass { static char ID; // Pass ID, replacement for typeid + const char *const Banner; - MachineVerifierPass() - : MachineFunctionPass(ID) { + MachineVerifierPass(const char *b = 0) + : MachineFunctionPass(ID), Banner(b) { initializeMachineVerifierPassPass(*PassRegistry::getPassRegistry()); } @@ -208,7 +211,7 @@ namespace { } bool runOnMachineFunction(MachineFunction &MF) { - MF.verify(this); + MF.verify(this, Banner); return false; } }; @@ -219,12 +222,13 @@ char MachineVerifierPass::ID = 0; INITIALIZE_PASS(MachineVerifierPass, "machineverifier", "Verify generated machine code", false, false) -FunctionPass *llvm::createMachineVerifierPass() { - return new MachineVerifierPass(); +FunctionPass *llvm::createMachineVerifierPass(const char *Banner) { + return new MachineVerifierPass(Banner); } -void MachineFunction::verify(Pass *p) const { - MachineVerifier(p).runOnMachineFunction(const_cast(*this)); +void MachineFunction::verify(Pass *p, const char *Banner) const { + MachineVerifier(p, Banner) + .runOnMachineFunction(const_cast(*this)); } bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) { @@ -297,8 +301,11 @@ bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) { void MachineVerifier::report(const char *msg, const MachineFunction *MF) { assert(MF); *OS << '\n'; - if (!foundErrors++) + if (!foundErrors++) { + if (Banner) + *OS << "# " << Banner << '\n'; MF->print(*OS, Indexes); + } *OS << "*** Bad machine code: " << msg << " ***\n" << "- function: " << MF->getFunction()->getNameStr() << "\n"; } -- cgit v1.1 From 22d67cf6ac84c06867681a2fe72f78d5d2b9444d Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Sun, 19 Dec 2010 21:37:23 +0000 Subject: Fix PR8811 by teaching MachineVerifier about optional defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122199 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 1007d8e..2b1c726 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -555,6 +555,7 @@ void MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { const MachineInstr *MI = MO->getParent(); const TargetInstrDesc &TI = MI->getDesc(); + const TargetOperandInfo &TOI = TI.OpInfo[MONum]; // The first TI.NumDefs operands must be explicit register defines if (MONum < TI.getNumDefs()) { @@ -568,8 +569,8 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { // Don't check if it's the last operand in a variadic instruction. See, // e.g., LDM_RET in the arm back end. if (MO->isReg() && !(TI.isVariadic() && MONum == TI.getNumOperands()-1)) { - if (MO->isDef()) - report("Explicit operand marked as def", MO, MONum); + if (MO->isDef() && !TOI.isOptionalDef()) + report("Explicit operand marked as def", MO, MONum); if (MO->isImplicit()) report("Explicit operand marked as implicit", MO, MONum); } @@ -706,7 +707,6 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { // Check register classes. if (MONum < TI.getNumOperands() && !MO->isImplicit()) { - const TargetOperandInfo &TOI = TI.OpInfo[MONum]; unsigned SubIdx = MO->getSubReg(); if (TargetRegisterInfo::isPhysicalRegister(Reg)) { -- cgit v1.1 From 1b031ddedec2901ef01f103512b1d79f63a1bb85 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Sun, 19 Dec 2010 23:50:53 +0000 Subject: Early clobber operands are allowed to be defined at use indices. This fixes one half of PR8813. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122205 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 2b1c726..f7713fd 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -690,7 +690,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { const LiveInterval &LI = LiveInts->getInterval(Reg); if (const VNInfo *VNI = LI.getVNInfoAt(DefIdx)) { assert(VNI && "NULL valno is not allowed"); - if (VNI->def != DefIdx) { + if (VNI->def != DefIdx && !MO->isEarlyClobber()) { report("Inconsistent valno->def", MO, MONum); *OS << "Valno " << VNI->id << " is not defined at " << DefIdx << " in " << LI << '\n'; -- cgit v1.1 From 8ec88ba58866a840a27ab5172fd2b954780b52f3 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Mon, 20 Dec 2010 00:08:10 +0000 Subject: Ignore debug values when performing MachineVerifier liveness checks. Fixes PR8822. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122207 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index f7713fd..4025e29 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -587,7 +587,9 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { return; // Check Live Variables. - if (MO->isUndef()) { + if (MI->isDebugValue()) { + // Liveness checks are not valid for debug values. + } else if (MO->isUndef()) { // An doesn't refer to any register, so just skip it. } else if (MO->isUse()) { regsLiveInButUnused.erase(Reg); -- cgit v1.1 From 636f15ff04c9188ea3bf91477fda1cc29f2c4a61 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Mon, 20 Dec 2010 01:22:37 +0000 Subject: Don't assume that an instruction ending a register's live range always reads the register; it may be a dead def instead. Fixes PR8820. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122218 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 4025e29..d0f251e 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -1072,10 +1072,24 @@ void MachineVerifier::verifyLiveIntervals() { << MBBStartIdx << '\n'; } else if (TargetRegisterInfo::isVirtualRegister(LI.reg) && !MI->readsVirtualRegister(LI.reg)) { - // FIXME: Should we require a kill flag? - report("Instruction killing live segment doesn't read register", MI); - I->print(*OS); - *OS << " in " << LI << '\n'; + // A live range can end with either a redefinition, a kill flag on a + // use, or a dead flag on a def. + // FIXME: Should we check for each of these? + bool hasDeadDef = false; + for (MachineInstr::const_mop_iterator MOI = MI->operands_begin(), + MOE = MI->operands_end(); MOI != MOE; ++MOI) { + if (MOI->isReg() && MOI->isDef() && MOI->isDead()) { + hasDeadDef = true; + break; + } + } + + if (!hasDeadDef) { + report("Instruction killing live segment neither defines nor reads " + "register", MI); + I->print(*OS); + *OS << " in " << LI << '\n'; + } } } -- cgit v1.1 From 5e61f9916eb1e97cf4d696cdc416ad1314ad7138 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Mon, 20 Dec 2010 02:59:51 +0000 Subject: Add a missing check from r122218. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122224 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index d0f251e..248bbe1 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -1078,7 +1078,7 @@ void MachineVerifier::verifyLiveIntervals() { bool hasDeadDef = false; for (MachineInstr::const_mop_iterator MOI = MI->operands_begin(), MOE = MI->operands_end(); MOI != MOE; ++MOI) { - if (MOI->isReg() && MOI->isDef() && MOI->isDead()) { + if (MOI->isReg() && MOI->getReg() == LI.reg && MOI->isDef() && MOI->isDead()) { hasDeadDef = true; break; } -- cgit v1.1 From 0b13d7db281d1c64194269822713ae30a1f921d5 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Mon, 20 Dec 2010 03:15:20 +0000 Subject: Teach MachineVerifier that early clobber defs begin at USE slots and other defs begin at DEF slots. Fixes the second half of PR8813. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122225 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 248bbe1..779fa9e 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -1005,11 +1005,6 @@ void MachineVerifier::verifyLiveIntervals() { } } else { // Non-PHI def. - if (!VNI->def.isDef()) { - report("Non-PHI def must be at a DEF slot", MF); - *OS << "Valno #" << VNI->id << " is defined at " << VNI->def - << " in " << LI << '\n'; - } const MachineInstr *MI = LiveInts->getInstructionFromIndex(VNI->def); if (!MI) { report("No instruction at def index", MF); @@ -1019,6 +1014,32 @@ void MachineVerifier::verifyLiveIntervals() { report("Defining instruction does not modify register", MI); *OS << "Valno #" << VNI->id << " in " << LI << '\n'; } + + bool isEarlyClobber = false; + if (MI) { + for (MachineInstr::const_mop_iterator MOI = MI->operands_begin(), + MOE = MI->operands_end(); MOI != MOE; ++MOI) { + if (MOI->isReg() && MOI->getReg() == LI.reg && MOI->isDef() && + MOI->isEarlyClobber()) { + isEarlyClobber = true; + break; + } + } + } + + // Early clobber defs begin at USE slots, but other defs must begin at + // DEF slots. + if (isEarlyClobber) { + if (!VNI->def.isUse()) { + report("Early clobber def must be at a USE slot", MF); + *OS << "Valno #" << VNI->id << " is defined at " << VNI->def + << " in " << LI << '\n'; + } + } else if (!VNI->def.isDef()) { + report("Non-PHI, non-early clobber def must be at a DEF slot", MF); + *OS << "Valno #" << VNI->id << " is defined at " << VNI->def + << " in " << LI << '\n'; + } } } -- cgit v1.1 From 2100d21f39a9471254564e359ab8c5901c7aecff Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Mon, 20 Dec 2010 04:19:48 +0000 Subject: MachineVerifier should count landing pad successors as basic blocks rather than out-edges. Fixes PR8824. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122228 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 779fa9e..d5dda48 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -380,11 +380,13 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) { const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); // Count the number of landing pad successors. - unsigned LandingPadSuccs = 0; + SmallPtrSet LandingPadSuccs; for (MachineBasicBlock::const_succ_iterator I = MBB->succ_begin(), - E = MBB->succ_end(); I != E; ++I) - LandingPadSuccs += (*I)->isLandingPad(); - if (LandingPadSuccs > 1) + E = MBB->succ_end(); I != E; ++I) { + if ((*I)->isLandingPad()) + LandingPadSuccs.insert(*I); + } + if (LandingPadSuccs.size() > 1) report("MBB has more than one landing pad successor", MBB); // Call AnalyzeBranch. If it succeeds, there several more conditions to check. @@ -402,11 +404,11 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) { // It's possible that the block legitimately ends with a noreturn // call or an unreachable, in which case it won't actually fall // out the bottom of the function. - } else if (MBB->succ_size() == LandingPadSuccs) { + } else if (MBB->succ_size() == LandingPadSuccs.size()) { // It's possible that the block legitimately ends with a noreturn // call or an unreachable, in which case it won't actuall fall // out of the block. - } else if (MBB->succ_size() != 1+LandingPadSuccs) { + } else if (MBB->succ_size() != 1+LandingPadSuccs.size()) { report("MBB exits via unconditional fall-through but doesn't have " "exactly one CFG successor!", MBB); } else if (!MBB->isSuccessor(MBBI)) { @@ -424,7 +426,7 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) { } } else if (TBB && !FBB && Cond.empty()) { // Block unconditionally branches somewhere. - if (MBB->succ_size() != 1+LandingPadSuccs) { + if (MBB->succ_size() != 1+LandingPadSuccs.size()) { report("MBB exits via unconditional branch but doesn't have " "exactly one CFG successor!", MBB); } else if (!MBB->isSuccessor(TBB)) { -- cgit v1.1 From 4eee42cb282753ad43e929b0955d7d44c1580905 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Mon, 27 Dec 2010 05:17:23 +0000 Subject: Add knowledge of phi-def and phi-kill valnos to MachineVerifier's predecessor valno verification. The "Different value live out of predecessor" check is incorrect in the case of phi-def valnos, so just skip that check for phi-def valnos and instead check that all of the valnos for predecessors have phi-kill. Fixes PR8863. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122581 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index d5dda48..0c29969 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -1146,7 +1146,23 @@ void MachineVerifier::verifyLiveIntervals() { *OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber() << '@' << LiveInts->getMBBStartIdx(MFI) << ", not live at " << PEnd << " in " << LI << '\n'; - } else if (PVNI != VNI) { + continue; + } + + if (VNI->isPHIDef() && VNI->def == LiveInts->getMBBStartIdx(MFI)) { + if (!PVNI->hasPHIKill()) { + report("Value live out of predecessor doesn't have PHIKill", MF); + *OS << "Valno #" << PVNI->id << " live out of BB#" + << (*PI)->getNumber() << '@' << PEnd + << " doesn't have PHIKill, but Valno #" << VNI->id + << " is PHIDef and defined at the beginning of BB#" + << MFI->getNumber() << '@' << LiveInts->getMBBStartIdx(MFI) + << " in " << LI << '\n'; + } + continue; + } + + if (PVNI != VNI) { report("Different value live out of predecessor", *PI); *OS << "Valno #" << PVNI->id << " live out of BB#" << (*PI)->getNumber() << '@' << PEnd -- cgit v1.1 From cb584d08c0734d64f95b0f762aa31ea8ce3de2d9 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Tue, 28 Dec 2010 23:45:38 +0000 Subject: Simplify some code in MachineVerifier that was doing the correct thing, but not in the most obvious way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122610 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 0c29969..53e04ce 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -1118,8 +1118,8 @@ void MachineVerifier::verifyLiveIntervals() { // Now check all the basic blocks in this live segment. MachineFunction::const_iterator MFI = MBB; - // Is LI live-in to MBB and not a PHIDef? - if (I->start == VNI->def) { + // Is this live range the beginning of a non-PHIDef VN? + if (I->start == VNI->def && !VNI->isPHIDef()) { // Not live-in to any blocks. if (MBB == EndMBB) continue; @@ -1141,16 +1141,9 @@ void MachineVerifier::verifyLiveIntervals() { PE = MFI->pred_end(); PI != PE; ++PI) { SlotIndex PEnd = LiveInts->getMBBEndIdx(*PI).getPrevSlot(); const VNInfo *PVNI = LI.getVNInfoAt(PEnd); - if (!PVNI) { - report("Register not marked live out of predecessor", *PI); - *OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber() - << '@' << LiveInts->getMBBStartIdx(MFI) << ", not live at " - << PEnd << " in " << LI << '\n'; - continue; - } if (VNI->isPHIDef() && VNI->def == LiveInts->getMBBStartIdx(MFI)) { - if (!PVNI->hasPHIKill()) { + if (PVNI && !PVNI->hasPHIKill()) { report("Value live out of predecessor doesn't have PHIKill", MF); *OS << "Valno #" << PVNI->id << " live out of BB#" << (*PI)->getNumber() << '@' << PEnd @@ -1162,6 +1155,14 @@ void MachineVerifier::verifyLiveIntervals() { continue; } + if (!PVNI) { + report("Register not marked live out of predecessor", *PI); + *OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber() + << '@' << LiveInts->getMBBStartIdx(MFI) << ", not live at " + << PEnd << " in " << LI << '\n'; + continue; + } + if (PVNI != VNI) { report("Different value live out of predecessor", *PI); *OS << "Valno #" << PVNI->id << " live out of BB#" -- cgit v1.1 From 98c54760704878cf5290a9a3b23876b7550c5560 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 8 Jan 2011 23:11:02 +0000 Subject: Fix a MachineVerifier loop that probably didn't mean to skip the last two virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123100 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 53e04ce..11f753a 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -925,8 +925,8 @@ void MachineVerifier::visitMachineFunctionAfter() { void MachineVerifier::verifyLiveVariables() { assert(LiveVars && "Don't call verifyLiveVariables without LiveVars"); - for (unsigned Reg = TargetRegisterInfo::FirstVirtualRegister, - RegE = MRI->getLastVirtReg()-1; Reg != RegE; ++Reg) { + for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) { + unsigned Reg = TargetRegisterInfo::index2VirtReg(i); LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg); for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end(); MFI != MFE; ++MFI) { -- cgit v1.1 From 4314268128be6d54c9a7f0709680e5a5b40f3ab3 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sun, 9 Jan 2011 03:05:53 +0000 Subject: Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 11f753a..83c980d 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -936,13 +936,13 @@ void MachineVerifier::verifyLiveVariables() { if (MInfo.vregsRequired.count(Reg)) { if (!VI.AliveBlocks.test(MFI->getNumber())) { report("LiveVariables: Block missing from AliveBlocks", MFI); - *OS << "Virtual register %reg" << Reg + *OS << "Virtual register " << PrintReg(Reg) << " must be live through the block.\n"; } } else { if (VI.AliveBlocks.test(MFI->getNumber())) { report("LiveVariables: Block should not be in AliveBlocks", MFI); - *OS << "Virtual register %reg" << Reg + *OS << "Virtual register " << PrintReg(Reg) << " is not needed live through the block.\n"; } } -- cgit v1.1 From 7bd46dae9c0e7e93df27186a4885293f8295b093 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 12 Jan 2011 21:27:41 +0000 Subject: Verify that machine instruction parent pointers are consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123322 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 83c980d..cceb4b6 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -273,6 +273,11 @@ bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) { visitMachineBasicBlockBefore(MFI); for (MachineBasicBlock::const_iterator MBBI = MFI->begin(), MBBE = MFI->end(); MBBI != MBBE; ++MBBI) { + if (MBBI->getParent() != MFI) { + report("Bad instruction parent pointer", MFI); + *OS << "Instruction: " << *MBBI; + continue; + } visitMachineInstrBefore(MBBI); for (unsigned I = 0, E = MBBI->getNumOperands(); I != E; ++I) visitMachineOperand(&MBBI->getOperand(I), I); -- cgit v1.1 From fc69c370e165958d7d9a6d756a32479674d83888 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 12 Jan 2011 21:27:48 +0000 Subject: Verify slot index ordering. The slot indexes must be monotonically increasing through the function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123324 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index cceb4b6..ad93f9c 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -74,6 +74,8 @@ namespace { RegVector regsDefined, regsDead, regsKilled; RegSet regsLiveInButUnused; + SlotIndex lastIndex; + // Add Reg and any sub-registers to RV void addRegWithSubRegs(RegVector &RV, unsigned Reg) { RV.push_back(Reg); @@ -356,6 +358,7 @@ void MachineVerifier::markReachable(const MachineBasicBlock *MBB) { } void MachineVerifier::visitMachineFunctionBefore() { + lastIndex = SlotIndex(); regsReserved = TRI->getReservedRegs(*MF); // A sub-register of a reserved register is also reserved @@ -524,6 +527,9 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) { regsKilled.clear(); regsDefined.clear(); + + if (Indexes) + lastIndex = Indexes->getMBBStartIdx(MBB); } void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { @@ -793,12 +799,31 @@ void MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI) { set_subtract(regsLive, regsKilled); regsKilled.clear(); set_subtract(regsLive, regsDead); regsDead.clear(); set_union(regsLive, regsDefined); regsDefined.clear(); + + if (Indexes && Indexes->hasIndex(MI)) { + SlotIndex idx = Indexes->getInstructionIndex(MI); + if (!(idx > lastIndex)) { + report("Instruction index out of order", MI); + *OS << "Last instruction was at " << lastIndex << '\n'; + } + lastIndex = idx; + } } void MachineVerifier::visitMachineBasicBlockAfter(const MachineBasicBlock *MBB) { MBBInfoMap[MBB].regsLiveOut = regsLive; regsLive.clear(); + + if (Indexes) { + SlotIndex stop = Indexes->getMBBEndIdx(MBB); + if (!(stop > lastIndex)) { + report("Block ends before last instruction index", MBB); + *OS << "Block ends at " << stop + << " last instruction was at " << lastIndex << '\n'; + } + lastIndex = stop; + } } // Calculate the largest possible vregsPassed sets. These are the registers that -- cgit v1.1 From a7b586ba7410dd2dddbfa82a6a57485985747f2c Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 4 Feb 2011 00:39:18 +0000 Subject: Verify kill flags conservatively. Allow a live range to end with a kill flag, but don't allow a kill flag that doesn't end the live range. This makes the machine code verifier more useful during register allocation when kill flag computation is deferred. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124838 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index ad93f9c..7351119 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -647,24 +647,11 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { report("No live range at use", MO, MONum); *OS << UseIdx << " is not live in " << LI << '\n'; } - // Verify isKill == LI.killedAt. - // Two-address instrs don't have kill flags on the tied operands, and - // we even allow - // %r1 = add %r1, %r1 - // without a kill flag on the untied operand. - // MI->findRegisterUseOperandIdx finds the first operand using reg. - if (!MI->isRegTiedToDefOperand(MI->findRegisterUseOperandIdx(Reg))) { - // MI could kill register without a kill flag on MO. - bool miKill = MI->killsRegister(Reg); - bool liKill = LI.killedAt(UseIdx.getDefIndex()); - if (miKill && !liKill) { - report("Live range continues after kill flag", MO, MONum); - *OS << "Live range: " << LI << '\n'; - } - if (!miKill && liKill) { - report("Live range ends without kill flag", MO, MONum); - *OS << "Live range: " << LI << '\n'; - } + // Check for extra kill flags. + // Note that we allow missing kill flags for now. + if (MO->isKill() && !LI.killedAt(UseIdx.getDefIndex())) { + report("Live range continues after kill flag", MO, MONum); + *OS << "Live range: " << LI << '\n'; } } else { report("Virtual register has no Live interval", MO, MONum); -- cgit v1.1