From 36ae6c182759871a4af71d9af85f970b29a669f1 Mon Sep 17 00:00:00 2001
From: Bill Wendling <isanbard@gmail.com>
Date: Wed, 4 Mar 2009 00:18:06 +0000
Subject: The DAG combiner was performing a BT combine. The BT combine had a
 value of -1, so it changed it into a 31 via the TLO.ShrinkDemandedConstant()
 call. Then it would go through the DAG combiner again. This time it had a
 value of 31, which was turned into a -1 by TLI.SimplifyDemandedBits(). This
 would ping pong forever.

Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded
value is an XOR of all ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65985 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/SelectionDAG/TargetLowering.cpp | 33 +++++++++++++++++++----------
 1 file changed, 22 insertions(+), 11 deletions(-)

(limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index e92932b..7913c01 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -746,23 +746,34 @@ TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
 bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op, 
                                                         const APInt &Demanded) {
   DebugLoc dl = Op.getDebugLoc();
+
   // FIXME: ISD::SELECT, ISD::SELECT_CC
   switch (Op.getOpcode()) {
   default: break;
-  case ISD::AND:
-  case ISD::OR:
   case ISD::XOR:
-    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
-      if (C->getAPIntValue().intersects(~Demanded)) {
-        MVT VT = Op.getValueType();
-        SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
-                                    DAG.getConstant(Demanded &
-                                                      C->getAPIntValue(), 
-                                                    VT));
-        return CombineTo(Op, New);
-      }
+  case ISD::AND:
+  case ISD::OR: {
+    ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
+    if (!C) return false;
+
+    if (Op.getOpcode() == ISD::XOR &&
+        (C->getAPIntValue() | (~Demanded)).isAllOnesValue())
+      return false;
+
+    // if we can expand it to have all bits set, do it
+    if (C->getAPIntValue().intersects(~Demanded)) {
+      MVT VT = Op.getValueType();
+      SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
+                                DAG.getConstant(Demanded &
+                                                C->getAPIntValue(), 
+                                                VT));
+      return CombineTo(Op, New);
+    }
+
     break;
   }
+  }
+
   return false;
 }
 
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