From 2ce7f2068f13566f5a70ee779e3bb83a6cb8d942 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 5 Dec 2008 05:45:42 +0000 Subject: Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60586 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LiveIntervalAnalysis.cpp | 2 +- lib/CodeGen/MachineInstr.cpp | 7 ++++--- lib/CodeGen/PostRASchedulerList.cpp | 2 +- lib/CodeGen/RegAllocLocal.cpp | 2 +- 4 files changed, 7 insertions(+), 6 deletions(-) (limited to 'lib/CodeGen') diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index eb237ef..18ee27b 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -426,7 +426,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // must be due to phi elimination or two addr elimination. If this is // the result of two address elimination, then the vreg is one of the // def-and-use register operand. - if (mi->isRegReDefinedByTwoAddr(interval.reg, MOIdx)) { + if (mi->isRegReDefinedByTwoAddr(MOIdx)) { // If this is a two-address definition, then we have already processed // the live range. The only problem is that we didn't realize there // are actually two values in the live interval. Because of this we diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 5c5ba50..2cca6c0 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -646,13 +646,14 @@ int MachineInstr::findFirstPredOperandIdx() const { return -1; } -/// isRegReDefinedByTwoAddr - Given the defined register and the operand index, +/// isRegReDefinedByTwoAddr - Given the index of a register def operand, /// check if the register def is a re-definition due to two addr elimination. -bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{ +bool MachineInstr::isRegReDefinedByTwoAddr(unsigned DefIdx) const{ + assert(getOperand(DefIdx).isDef() && "DefIdx is not a def!"); const TargetInstrDesc &TID = getDesc(); for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) { const MachineOperand &MO = getOperand(i); - if (MO.isReg() && MO.isUse() && MO.getReg() == Reg && + if (MO.isReg() && MO.isUse() && TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx) return true; } diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp index b19525c..5ee6ed0 100644 --- a/lib/CodeGen/PostRASchedulerList.cpp +++ b/lib/CodeGen/PostRASchedulerList.cpp @@ -478,7 +478,7 @@ bool SchedulePostRATDList::BreakAntiDependencies() { if (Reg == 0) continue; if (!MO.isDef()) continue; // Ignore two-addr defs. - if (MI->isRegReDefinedByTwoAddr(Reg, i)) continue; + if (MI->isRegReDefinedByTwoAddr(i)) continue; DefIndices[Reg] = Count; KillIndices[Reg] = -1; diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index 7c3c81e..bf4e205 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -609,7 +609,7 @@ void RALocal::ComputeLocalLiveness(MachineBasicBlock& MBB) { // Check if this is a two address instruction. If so, then // the def does not kill the use. if (last->second.first == I && - I->isRegReDefinedByTwoAddr(MO.getReg(), i)) + I->isRegReDefinedByTwoAddr(i)) continue; MachineOperand& lastUD = -- cgit v1.1