From 47857812e29324a9d1560796a05b53d3a9217fd9 Mon Sep 17 00:00:00 2001 From: Reid Spencer Date: Sun, 31 Dec 2006 05:55:36 +0000 Subject: For PR950: Three changes: 1. Convert signed integer types to signless versions. 2. Implement the @sext and @zext parameter attributes. Previously the type of an function parameter was used to determine whether it should be sign extended or zero extended before the call. This information is now communicated via the function type's parameter attributes. 3. The interface to LowerCallTo had to be changed in order to accommodate the parameter attribute information. Although it would have been convenient to pass in the FunctionType itself, there isn't always one present in the caller. Consequently, a signedness indication for the result type and for each parameter was provided for in the interface to this method. All implementations were changed to make the adjustment necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/AsmPrinter.cpp | 10 +-- lib/CodeGen/IntrinsicLowering.cpp | 60 +++++++------- lib/CodeGen/MachOWriter.cpp | 12 +-- lib/CodeGen/MachineDebugInfo.cpp | 22 +++--- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 108 +++++++++++++++----------- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 108 +++++++++++++------------- 6 files changed, 169 insertions(+), 151 deletions(-) (limited to 'lib/CodeGen') diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp index 5bbcaee..3f4bfd7 100644 --- a/lib/CodeGen/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter.cpp @@ -607,7 +607,7 @@ void AsmPrinter::EmitGlobalConstant(const Constant *CV) { << "\t" << TAI->getCommentString() << " float " << Val << "\n"; return; } - } else if (CV->getType() == Type::ULongTy || CV->getType() == Type::LongTy) { + } else if (CV->getType() == Type::Int64Ty) { if (const ConstantInt *CI = dyn_cast(CV)) { uint64_t Val = CI->getZExtValue(); @@ -918,10 +918,10 @@ void AsmPrinter::printDataDirective(const Type *type) { const TargetData *TD = TM.getTargetData(); switch (type->getTypeID()) { case Type::BoolTyID: - case Type::UByteTyID: case Type::SByteTyID: + case Type::Int8TyID: O << TAI->getData8bitsDirective(); break; - case Type::UShortTyID: case Type::ShortTyID: + case Type::Int16TyID: O << TAI->getData16bitsDirective(); break; case Type::PointerTyID: @@ -932,10 +932,10 @@ void AsmPrinter::printDataDirective(const Type *type) { break; } //Fall through for pointer size == int size - case Type::UIntTyID: case Type::IntTyID: + case Type::Int32TyID: O << TAI->getData32bitsDirective(); break; - case Type::ULongTyID: case Type::LongTyID: + case Type::Int64TyID: assert(TAI->getData64bitsDirective() && "Target cannot handle 64-bit constant exprs!"); O << TAI->getData64bitsDirective(); diff --git a/lib/CodeGen/IntrinsicLowering.cpp b/lib/CodeGen/IntrinsicLowering.cpp index d6c79ad..41d48d9 100644 --- a/lib/CodeGen/IntrinsicLowering.cpp +++ b/lib/CodeGen/IntrinsicLowering.cpp @@ -95,7 +95,7 @@ void IntrinsicLowering::AddPrototypes(Module &M) { default: break; case Intrinsic::setjmp: EnsureFunctionExists(M, "setjmp", I->arg_begin(), I->arg_end(), - Type::IntTy); + Type::Int32Ty); break; case Intrinsic::longjmp: EnsureFunctionExists(M, "longjmp", I->arg_begin(), I->arg_end(), @@ -117,9 +117,9 @@ void IntrinsicLowering::AddPrototypes(Module &M) { break; case Intrinsic::memset_i32: case Intrinsic::memset_i64: - M.getOrInsertFunction("memset", PointerType::get(Type::SByteTy), - PointerType::get(Type::SByteTy), - Type::IntTy, (--(--I->arg_end()))->getType(), + M.getOrInsertFunction("memset", PointerType::get(Type::Int8Ty), + PointerType::get(Type::Int8Ty), + Type::Int32Ty, (--(--I->arg_end()))->getType(), (Type *)0); break; case Intrinsic::isunordered_f32: @@ -150,26 +150,26 @@ static Value *LowerBSWAP(Value *V, Instruction *IP) { default: assert(0 && "Unhandled type size of value to byteswap!"); case 16: { Value *Tmp1 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,8),"bswap.2",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.2",IP); Value *Tmp2 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,8),"bswap.1",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.1",IP); V = BinaryOperator::createOr(Tmp1, Tmp2, "bswap.i16", IP); break; } case 32: { Value *Tmp4 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,24),"bswap.4", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.4", IP); Value *Tmp3 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,8),"bswap.3",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.3",IP); Value *Tmp2 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,8),"bswap.2",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.2",IP); Value *Tmp1 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,24),"bswap.1", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.1", IP); Tmp3 = BinaryOperator::createAnd(Tmp3, - ConstantInt::get(Type::UIntTy, 0xFF0000), + ConstantInt::get(Type::Int32Ty, 0xFF0000), "bswap.and3", IP); Tmp2 = BinaryOperator::createAnd(Tmp2, - ConstantInt::get(Type::UIntTy, 0xFF00), + ConstantInt::get(Type::Int32Ty, 0xFF00), "bswap.and2", IP); Tmp4 = BinaryOperator::createOr(Tmp4, Tmp3, "bswap.or1", IP); Tmp2 = BinaryOperator::createOr(Tmp2, Tmp1, "bswap.or2", IP); @@ -178,39 +178,39 @@ static Value *LowerBSWAP(Value *V, Instruction *IP) { } case 64: { Value *Tmp8 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,56),"bswap.8", IP); + ConstantInt::get(Type::Int8Ty,56),"bswap.8", IP); Value *Tmp7 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,40),"bswap.7", IP); + ConstantInt::get(Type::Int8Ty,40),"bswap.7", IP); Value *Tmp6 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,24),"bswap.6", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.6", IP); Value *Tmp5 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,8),"bswap.5", IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.5", IP); Value* Tmp4 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,8),"bswap.4", IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.4", IP); Value* Tmp3 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,24),"bswap.3", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.3", IP); Value* Tmp2 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,40),"bswap.2", IP); + ConstantInt::get(Type::Int8Ty,40),"bswap.2", IP); Value* Tmp1 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,56),"bswap.1", IP); + ConstantInt::get(Type::Int8Ty,56),"bswap.1", IP); Tmp7 = BinaryOperator::createAnd(Tmp7, - ConstantInt::get(Type::ULongTy, + ConstantInt::get(Type::Int64Ty, 0xFF000000000000ULL), "bswap.and7", IP); Tmp6 = BinaryOperator::createAnd(Tmp6, - ConstantInt::get(Type::ULongTy, 0xFF0000000000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF0000000000ULL), "bswap.and6", IP); Tmp5 = BinaryOperator::createAnd(Tmp5, - ConstantInt::get(Type::ULongTy, 0xFF00000000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF00000000ULL), "bswap.and5", IP); Tmp4 = BinaryOperator::createAnd(Tmp4, - ConstantInt::get(Type::ULongTy, 0xFF000000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF000000ULL), "bswap.and4", IP); Tmp3 = BinaryOperator::createAnd(Tmp3, - ConstantInt::get(Type::ULongTy, 0xFF0000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF0000ULL), "bswap.and3", IP); Tmp2 = BinaryOperator::createAnd(Tmp2, - ConstantInt::get(Type::ULongTy, 0xFF00ULL), + ConstantInt::get(Type::Int64Ty, 0xFF00ULL), "bswap.and2", IP); Tmp8 = BinaryOperator::createOr(Tmp8, Tmp7, "bswap.or1", IP); Tmp6 = BinaryOperator::createOr(Tmp6, Tmp5, "bswap.or2", IP); @@ -242,7 +242,7 @@ static Value *LowerCTPOP(Value *V, Instruction *IP) { Value *MaskCst = ConstantInt::get(V->getType(), MaskValues[ct]); Value *LHS = BinaryOperator::createAnd(V, MaskCst, "cppop.and1", IP); Value *VShift = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy, i), "ctpop.sh", IP); + ConstantInt::get(Type::Int8Ty, i), "ctpop.sh", IP); Value *RHS = BinaryOperator::createAnd(VShift, MaskCst, "cppop.and2", IP); V = BinaryOperator::createAdd(LHS, RHS, "ctpop.step", IP); } @@ -256,7 +256,7 @@ static Value *LowerCTLZ(Value *V, Instruction *IP) { unsigned BitSize = V->getType()->getPrimitiveSizeInBits(); for (unsigned i = 1; i != BitSize; i <<= 1) { - Value *ShVal = ConstantInt::get(Type::UByteTy, i); + Value *ShVal = ConstantInt::get(Type::Int8Ty, i); ShVal = new ShiftInst(Instruction::LShr, V, ShVal, "ctlz.sh", IP); V = BinaryOperator::createOr(V, ShVal, "ctlz.step", IP); } @@ -289,7 +289,7 @@ void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { static Function *SetjmpFCache = 0; static const unsigned castOpcodes[] = { Instruction::BitCast }; Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin()+1, CI->op_end(), - castOpcodes, Type::IntTy, SetjmpFCache); + castOpcodes, Type::Int32Ty, SetjmpFCache); if (CI->getType() != Type::VoidTy) CI->replaceAllUsesWith(V); break; @@ -381,7 +381,7 @@ void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { case Intrinsic::readcyclecounter: { cerr << "WARNING: this target does not support the llvm.readcyclecoun" << "ter intrinsic. It is being lowered to a constant 0\n"; - CI->replaceAllUsesWith(ConstantInt::get(Type::ULongTy, 0)); + CI->replaceAllUsesWith(ConstantInt::get(Type::Int64Ty, 0)); break; } diff --git a/lib/CodeGen/MachOWriter.cpp b/lib/CodeGen/MachOWriter.cpp index 924ef91..d4addf2 100644 --- a/lib/CodeGen/MachOWriter.cpp +++ b/lib/CodeGen/MachOWriter.cpp @@ -730,20 +730,17 @@ void MachOWriter::InitMem(const Constant *C, void *Addr, intptr_t Offset, switch (PC->getType()->getTypeID()) { case Type::BoolTyID: - case Type::UByteTyID: - case Type::SByteTyID: + case Type::Int8TyID: ptr[0] = cast(PC)->getZExtValue(); break; - case Type::UShortTyID: - case Type::ShortTyID: + case Type::Int16TyID: val = cast(PC)->getZExtValue(); if (TD->isBigEndian()) val = ByteSwap_16(val); ptr[0] = val; ptr[1] = val >> 8; break; - case Type::UIntTyID: - case Type::IntTyID: + case Type::Int32TyID: case Type::FloatTyID: if (PC->getType()->getTypeID() == Type::FloatTyID) { val = FloatToBits(cast(PC)->getValue()); @@ -758,8 +755,7 @@ void MachOWriter::InitMem(const Constant *C, void *Addr, intptr_t Offset, ptr[3] = val >> 24; break; case Type::DoubleTyID: - case Type::ULongTyID: - case Type::LongTyID: + case Type::Int64TyID: if (PC->getType()->getTypeID() == Type::DoubleTyID) { val = DoubleToBits(cast(PC)->getValue()); } else { diff --git a/lib/CodeGen/MachineDebugInfo.cpp b/lib/CodeGen/MachineDebugInfo.cpp index d3b6ecb..2708cec 100644 --- a/lib/CodeGen/MachineDebugInfo.cpp +++ b/lib/CodeGen/MachineDebugInfo.cpp @@ -55,8 +55,8 @@ getGlobalVariablesUsing(Module &M, const std::string &RootName) { std::vector Result; // GlobalVariables matching criteria. std::vector FieldTypes; - FieldTypes.push_back(Type::UIntTy); - FieldTypes.push_back(Type::UIntTy); + FieldTypes.push_back(Type::Int32Ty); + FieldTypes.push_back(Type::Int32Ty); // Get the GlobalVariable root. GlobalVariable *UseRoot = M.getGlobalVariable(RootName, @@ -264,16 +264,16 @@ public: /// Apply - Set the value of each of the fields. /// virtual void Apply(int &Field) { - Elements.push_back(ConstantInt::get(Type::IntTy, int32_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int32Ty, int32_t(Field))); } virtual void Apply(unsigned &Field) { - Elements.push_back(ConstantInt::get(Type::UIntTy, uint32_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int32Ty, uint32_t(Field))); } virtual void Apply(int64_t &Field) { - Elements.push_back(ConstantInt::get(Type::LongTy, int64_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int64Ty, int64_t(Field))); } virtual void Apply(uint64_t &Field) { - Elements.push_back(ConstantInt::get(Type::ULongTy, uint64_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int64Ty, uint64_t(Field))); } virtual void Apply(bool &Field) { Elements.push_back(ConstantBool::get(Field)); @@ -351,16 +351,16 @@ public: /// Apply - Set the value of each of the fields. /// virtual void Apply(int &Field) { - Fields.push_back(Type::IntTy); + Fields.push_back(Type::Int32Ty); } virtual void Apply(unsigned &Field) { - Fields.push_back(Type::UIntTy); + Fields.push_back(Type::Int32Ty); } virtual void Apply(int64_t &Field) { - Fields.push_back(Type::LongTy); + Fields.push_back(Type::Int64Ty); } virtual void Apply(uint64_t &Field) { - Fields.push_back(Type::ULongTy); + Fields.push_back(Type::Int64Ty); } virtual void Apply(bool &Field) { Fields.push_back(Type::BoolTy); @@ -1259,7 +1259,7 @@ const PointerType *DISerializer::getStrPtrType() { // If not already defined. if (!StrPtrTy) { // Construct the pointer to signed bytes. - StrPtrTy = PointerType::get(Type::SByteTy); + StrPtrTy = PointerType::get(Type::Int8Ty); } return StrPtrTy; diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 1b3e8d7..f0b1ec3 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -186,7 +186,7 @@ private: SDOperand CreateStackTemporary(MVT::ValueType VT); - SDOperand ExpandLibCall(const char *Name, SDNode *Node, + SDOperand ExpandLibCall(const char *Name, SDNode *Node, bool isSigned, SDOperand &Hi); SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source); @@ -2122,33 +2122,42 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // operation to an explicit libcall as appropriate. MVT::ValueType IntPtr = TLI.getPointerTy(); const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); - std::vector > Args; + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; const char *FnName = 0; if (Node->getOpcode() == ISD::MEMSET) { - Args.push_back(std::make_pair(Tmp2, IntPtrTy)); + Entry.Node = Tmp2; + Entry.Ty = IntPtrTy; + Entry.isSigned = false; + Args.push_back(Entry); // Extend the (previously legalized) ubyte argument to be an int value // for the call. if (Tmp3.getValueType() > MVT::i32) Tmp3 = DAG.getNode(ISD::TRUNCATE, MVT::i32, Tmp3); else Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3); - Args.push_back(std::make_pair(Tmp3, Type::IntTy)); - Args.push_back(std::make_pair(Tmp4, IntPtrTy)); + Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSigned = true; + Args.push_back(Entry); + Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); FnName = "memset"; } else if (Node->getOpcode() == ISD::MEMCPY || Node->getOpcode() == ISD::MEMMOVE) { - Args.push_back(std::make_pair(Tmp2, IntPtrTy)); - Args.push_back(std::make_pair(Tmp3, IntPtrTy)); - Args.push_back(std::make_pair(Tmp4, IntPtrTy)); + Entry.Node = Tmp2; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); + Entry.Node = Tmp3; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); + Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); FnName = Node->getOpcode() == ISD::MEMMOVE ? "memmove" : "memcpy"; } else { assert(0 && "Unknown op!"); } std::pair CallResult = - TLI.LowerCallTo(Tmp1, Type::VoidTy, false, CallingConv::C, false, + TLI.LowerCallTo(Tmp1, Type::VoidTy, false, false, CallingConv::C, false, DAG.getExternalSymbol(FnName, IntPtr), Args, DAG); Result = CallResult.second; break; @@ -2243,7 +2252,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { const char *FnName = Node->getOpcode() == ISD::UDIV ? "__udivsi3" : "__divsi3"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + bool isSigned = Node->getOpcode() == ISD::SDIV; + Result = ExpandLibCall(FnName, Node, isSigned, Dummy); }; break; } @@ -2346,7 +2356,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { DAG.getNode(ISD::FP_EXTEND, MVT::f64, Tmp2)); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } break; @@ -2419,6 +2429,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; case TargetLowering::Expand: unsigned DivOpc= (Node->getOpcode() == ISD::UREM) ? ISD::UDIV : ISD::SDIV; + bool isSigned = DivOpc == ISD::SDIV; if (MVT::isInteger(Node->getValueType(0))) { if (TLI.getOperationAction(DivOpc, Node->getValueType(0)) == TargetLowering::Legal) { @@ -2433,13 +2444,13 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { const char *FnName = Node->getOpcode() == ISD::UREM ? "__umodsi3" : "__modsi3"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, isSigned, Dummy); } } else { // Floating point mod -> fmod libcall. const char *FnName = Node->getValueType(0) == MVT::f32 ? "fmodf":"fmod"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); } break; } @@ -2688,7 +2699,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { default: assert(0 && "Unreachable!"); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } } @@ -2700,7 +2711,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { const char *FnName = Node->getValueType(0) == MVT::f32 ? "__powisf2" : "__powidf2"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } case ISD::BIT_CONVERT: @@ -2886,7 +2897,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { default: assert(0 && "Unreachable!"); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } case Promote: @@ -3609,13 +3620,15 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDOperand &LHS, SDOperand Dummy; Tmp1 = ExpandLibCall(FnName1, - DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, Dummy); + DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, + false, Dummy); Tmp2 = DAG.getConstant(0, MVT::i32); CC = DAG.getCondCode(CC1); if (FnName2) { Tmp1 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), Tmp1, Tmp2, CC); LHS = ExpandLibCall(FnName2, - DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, Dummy); + DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, + false, Dummy); Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), LHS, Tmp2, DAG.getCondCode(CC2)); Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2); @@ -4051,7 +4064,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, // by-reg argument. If it does fit into a single register, return the result // and leave the Hi part unset. SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node, - SDOperand &Hi) { + bool isSigned, SDOperand &Hi) { assert(!IsLegalizingCall && "Cannot overlap legalization of calls!"); // The input chain to this libcall is the entry node of the function. // Legalizing the call will automatically add the previous call to the @@ -4059,17 +4072,20 @@ SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node, SDOperand InChain = DAG.getEntryNode(); TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) { MVT::ValueType ArgVT = Node->getOperand(i).getValueType(); const Type *ArgTy = MVT::getTypeForValueType(ArgVT); - Args.push_back(std::make_pair(Node->getOperand(i), ArgTy)); + Entry.Node = Node->getOperand(i); Entry.Ty = ArgTy; + Entry.isSigned = isSigned; + Args.push_back(Entry); } SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy()); // Splice the libcall in wherever FindInputOutputChains tells us to. const Type *RetTy = MVT::getTypeForValueType(Node->getValueType(0)); std::pair CallInfo = - TLI.LowerCallTo(InChain, RetTy, false, CallingConv::C, false, + TLI.LowerCallTo(InChain, RetTy, isSigned, false, CallingConv::C, false, Callee, Args, DAG); // Legalize the call sequence, starting with the chain. This will advance @@ -4121,7 +4137,7 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { SignSet, Four, Zero); uint64_t FF = 0x5f800000ULL; if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantInt::get(Type::ULongTy, FF); + static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF); SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); @@ -4167,7 +4183,7 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { Source = DAG.getNode(ISD::SINT_TO_FP, DestTy, Source); SDOperand UnusedHiPart; - return ExpandLibCall(FnName, Source.Val, UnusedHiPart); + return ExpandLibCall(FnName, Source.Val, isSigned, UnusedHiPart); } /// ExpandLegalINT_TO_FP - This function is responsible for legalizing a @@ -4252,7 +4268,7 @@ SDOperand SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float) } if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantInt::get(Type::ULongTy, FF); + static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF); SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); @@ -4820,9 +4836,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } if (Node->getOperand(0).getValueType() == MVT::f32) - Lo = ExpandLibCall("__fixsfdi", Node, Hi); + Lo = ExpandLibCall("__fixsfdi", Node, false, Hi); else - Lo = ExpandLibCall("__fixdfdi", Node, Hi); + Lo = ExpandLibCall("__fixdfdi", Node, false, Hi); break; case ISD::FP_TO_UINT: @@ -4844,9 +4860,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } if (Node->getOperand(0).getValueType() == MVT::f32) - Lo = ExpandLibCall("__fixunssfdi", Node, Hi); + Lo = ExpandLibCall("__fixunssfdi", Node, false, Hi); else - Lo = ExpandLibCall("__fixunsdfdi", Node, Hi); + Lo = ExpandLibCall("__fixunsdfdi", Node, false, Hi); break; case ISD::SHL: { @@ -4895,7 +4911,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } // Otherwise, emit a libcall. - Lo = ExpandLibCall("__ashldi3", Node, Hi); + Lo = ExpandLibCall("__ashldi3", Node, false, Hi); break; } @@ -4927,7 +4943,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } // Otherwise, emit a libcall. - Lo = ExpandLibCall("__ashrdi3", Node, Hi); + Lo = ExpandLibCall("__ashrdi3", Node, true, Hi); break; } @@ -4959,7 +4975,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } // Otherwise, emit a libcall. - Lo = ExpandLibCall("__lshrdi3", Node, Hi); + Lo = ExpandLibCall("__lshrdi3", Node, false, Hi); break; } @@ -5046,31 +5062,35 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } } - Lo = ExpandLibCall("__muldi3" , Node, Hi); + Lo = ExpandLibCall("__muldi3" , Node, false, Hi); break; } - case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, Hi); break; - case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, Hi); break; - case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break; - case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break; + case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, true, Hi); break; + case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, false, Hi); break; + case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, true, Hi); break; + case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, false, Hi); break; case ISD::FADD: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__addsf3" : "__adddf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__addsf3" : "__adddf3"), Node, + false, Hi); break; case ISD::FSUB: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__subsf3" : "__subdf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__subsf3" : "__subdf3"), Node, + false, Hi); break; case ISD::FMUL: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__mulsf3" : "__muldf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__mulsf3" : "__muldf3"), Node, + false, Hi); break; case ISD::FDIV: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__divsf3" : "__divdf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__divsf3" : "__divdf3"), Node, + false, Hi); break; case ISD::FP_EXTEND: - Lo = ExpandLibCall("__extendsfdf2", Node, Hi); + Lo = ExpandLibCall("__extendsfdf2", Node, false, Hi); break; case ISD::FP_ROUND: - Lo = ExpandLibCall("__truncdfsf2", Node, Hi); + Lo = ExpandLibCall("__truncdfsf2", Node, false, Hi); break; case ISD::FSQRT: case ISD::FSIN: @@ -5082,7 +5102,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ case ISD::FCOS: FnName = (VT == MVT::f32) ? "cosf" : "cos"; break; default: assert(0 && "Unreachable!"); } - Lo = ExpandLibCall(FnName, Node, Hi); + Lo = ExpandLibCall(FnName, Node, false, Hi); break; } case ISD::FABS: { @@ -5133,7 +5153,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ : DAG.getZeroExtendInReg(Tmp, SrcVT); Node = DAG.UpdateNodeOperands(Op, Tmp).Val; } - Lo = ExpandLibCall(FnName, Node, Hi); + Lo = ExpandLibCall(FnName, Node, isSigned, Hi); break; } } diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 911f326..8a597da 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -396,13 +396,9 @@ class SelectionDAGLowering { /// The comparison function for sorting Case values. struct CaseCmp { bool operator () (const Case& C1, const Case& C2) { - if (const ConstantInt* I1 = dyn_cast(C1.first)) - if (I1->getType()->isUnsigned()) - return I1->getZExtValue() < - cast(C2.first)->getZExtValue(); - - return cast(C1.first)->getSExtValue() < - cast(C2.first)->getSExtValue(); + assert(isa(C1.first) && isa(C2.first)); + return cast(C1.first)->getZExtValue() < + cast(C2.first)->getZExtValue(); } }; @@ -756,7 +752,6 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) { NewValues.push_back(getRoot()); for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { SDOperand RetOp = getValue(I.getOperand(i)); - bool isSigned = I.getOperand(i)->getType()->isSigned(); // If this is an integer return value, we need to promote it ourselves to // the full width of a register, since LegalizeOp will use ANY_EXTEND rather @@ -770,14 +765,14 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) { TmpVT = TLI.getTypeToTransformTo(MVT::i32); else TmpVT = MVT::i32; - - if (isSigned) - RetOp = DAG.getNode(ISD::SIGN_EXTEND, TmpVT, RetOp); - else - RetOp = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, RetOp); + const FunctionType *FTy = I.getParent()->getParent()->getFunctionType(); + ISD::NodeType ExtendKind = ISD::SIGN_EXTEND; + if (FTy->paramHasAttr(0, FunctionType::ZExtAttribute)) + ExtendKind = ISD::ZERO_EXTEND; + RetOp = DAG.getNode(ExtendKind, TmpVT, RetOp); } NewValues.push_back(RetOp); - NewValues.push_back(DAG.getConstant(isSigned, MVT::i32)); + NewValues.push_back(DAG.getConstant(false, MVT::i32)); } DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, &NewValues[0], NewValues.size())); @@ -1383,7 +1378,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) { // Create a CaseBlock record representing a conditional branch to // the LHS node if the value being switched on SV is less than C. // Otherwise, branch to LHS. - ISD::CondCode CC = C->getType()->isSigned() ? ISD::SETLT : ISD::SETULT; + ISD::CondCode CC = ISD::SETULT; SelectionDAGISel::CaseBlock CB(CC, SV, C, TrueBB, FalseBB, CR.CaseBB); if (CR.CaseBB == CurMBB) @@ -1705,12 +1700,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) { // If this is a constant subscript, handle it quickly. if (ConstantInt *CI = dyn_cast(Idx)) { if (CI->getZExtValue() == 0) continue; - uint64_t Offs; - if (CI->getType()->isSigned()) - Offs = (int64_t) - TD->getTypeSize(Ty)*cast(CI)->getSExtValue(); - else - Offs = + uint64_t Offs = TD->getTypeSize(Ty)*cast(CI)->getZExtValue(); N = DAG.getNode(ISD::ADD, N.getValueType(), N, getIntPtrConstant(Offs)); continue; @@ -1723,10 +1713,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) { // If the index is smaller or larger than intptr_t, truncate or extend // it. if (IdxN.getValueType() < N.getValueType()) { - if (Idx->getType()->isSigned()) - IdxN = DAG.getNode(ISD::SIGN_EXTEND, N.getValueType(), IdxN); - else - IdxN = DAG.getNode(ISD::ZERO_EXTEND, N.getValueType(), IdxN); + IdxN = DAG.getNode(ISD::SIGN_EXTEND, N.getValueType(), IdxN); } else if (IdxN.getValueType() > N.getValueType()) IdxN = DAG.getNode(ISD::TRUNCATE, N.getValueType(), IdxN); @@ -2185,25 +2172,30 @@ void SelectionDAGLowering::visitCall(CallInst &I) { return; } + const PointerType *PT = cast(I.getCalledValue()->getType()); + const FunctionType *FTy = cast(PT->getElementType()); + SDOperand Callee; if (!RenameFn) Callee = getValue(I.getOperand(0)); else Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy()); - std::vector > Args; + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; Args.reserve(I.getNumOperands()); for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) { Value *Arg = I.getOperand(i); SDOperand ArgNode = getValue(Arg); - Args.push_back(std::make_pair(ArgNode, Arg->getType())); + Entry.Node = ArgNode; Entry.Ty = Arg->getType(); + Entry.isSigned = FTy->paramHasAttr(i, FunctionType::SExtAttribute); + Args.push_back(Entry); } - const PointerType *PT = cast(I.getCalledValue()->getType()); - const FunctionType *FTy = cast(PT->getElementType()); - std::pair Result = - TLI.LowerCallTo(getRoot(), I.getType(), FTy->isVarArg(), I.getCallingConv(), - I.isTailCall(), Callee, Args, DAG); + TLI.LowerCallTo(getRoot(), I.getType(), + FTy->paramHasAttr(0,FunctionType::SExtAttribute), + FTy->isVarArg(), I.getCallingConv(), I.isTailCall(), + Callee, Args, DAG); if (I.getType() != Type::VoidTy) setValue(&I, Result.first); DAG.setRoot(Result.second); @@ -2785,11 +2777,15 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) { Src = DAG.getNode(ISD::MUL, Src.getValueType(), Src, getIntPtrConstant(ElementSize)); - std::vector > Args; - Args.push_back(std::make_pair(Src, TLI.getTargetData()->getIntPtrType())); + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; + Entry.Node = Src; + Entry.Ty = TLI.getTargetData()->getIntPtrType(); + Entry.isSigned = false; + Args.push_back(Entry); std::pair Result = - TLI.LowerCallTo(getRoot(), I.getType(), false, CallingConv::C, true, + TLI.LowerCallTo(getRoot(), I.getType(), false, false, CallingConv::C, true, DAG.getExternalSymbol("malloc", IntPtr), Args, DAG); setValue(&I, Result.first); // Pointers always fit in registers @@ -2797,12 +2793,15 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) { } void SelectionDAGLowering::visitFree(FreeInst &I) { - std::vector > Args; - Args.push_back(std::make_pair(getValue(I.getOperand(0)), - TLI.getTargetData()->getIntPtrType())); + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; + Entry.Node = getValue(I.getOperand(0)); + Entry.Ty = TLI.getTargetData()->getIntPtrType(); + Entry.isSigned = false; + Args.push_back(Entry); MVT::ValueType IntPtr = TLI.getPointerTy(); std::pair Result = - TLI.LowerCallTo(getRoot(), Type::VoidTy, false, CallingConv::C, true, + TLI.LowerCallTo(getRoot(), Type::VoidTy, false, false, CallingConv::C, true, DAG.getExternalSymbol("free", IntPtr), Args, DAG); DAG.setRoot(Result.second); } @@ -2939,8 +2938,11 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { // Set up the return result vector. Ops.clear(); + const FunctionType *FTy = F.getFunctionType(); unsigned i = 0; - for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I) { + unsigned Idx = 1; + for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; + ++I, ++Idx) { MVT::ValueType VT = getValueType(I->getType()); switch (getTypeAction(VT)) { @@ -2951,8 +2953,9 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { case Promote: { SDOperand Op(Result, i++); if (MVT::isInteger(VT)) { - unsigned AssertOp = I->getType()->isSigned() ? ISD::AssertSext - : ISD::AssertZext; + unsigned AssertOp = ISD::AssertSext; + if (FTy->paramHasAttr(Idx, FunctionType::ZExtAttribute)) + AssertOp = ISD::AssertZext; Op = DAG.getNode(AssertOp, Op.getValueType(), Op, DAG.getValueType(VT)); Op = DAG.getNode(ISD::TRUNCATE, VT, Op); } else { @@ -3035,7 +3038,8 @@ static void ExpandScalarCallArgs(MVT::ValueType VT, SDOperand Arg, /// lowered by the target to something concrete. FIXME: When all targets are /// migrated to using ISD::CALL, this hook should be integrated into SDISel. std::pair -TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, +TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, + bool RetTyIsSigned, bool isVarArg, unsigned CallingConv, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { @@ -3048,9 +3052,9 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, // Handle all of the outgoing arguments. for (unsigned i = 0, e = Args.size(); i != e; ++i) { - MVT::ValueType VT = getValueType(Args[i].second); - SDOperand Op = Args[i].first; - bool isSigned = Args[i].second->isSigned(); + MVT::ValueType VT = getValueType(Args[i].Ty); + SDOperand Op = Args[i].Node; + bool isSigned = Args[i].isSigned; switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); case Legal: @@ -3077,7 +3081,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, } else { // Otherwise, this is a vector type. We only support legal vectors // right now. - const PackedType *PTy = cast(Args[i].second); + const PackedType *PTy = cast(Args[i].Ty); unsigned NumElems = PTy->getNumElements(); const Type *EltTy = PTy->getElementType(); @@ -3177,8 +3181,9 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, abort(); } } else if (MVT::isInteger(VT)) { - unsigned AssertOp = RetTy->isSigned() ? - ISD::AssertSext : ISD::AssertZext; + unsigned AssertOp = ISD::AssertSext; + if (!RetTyIsSigned) + AssertOp = ISD::AssertZext; ResVal = DAG.getNode(AssertOp, ResVal.getValueType(), ResVal, DAG.getValueType(VT)); ResVal = DAG.getNode(ISD::TRUNCATE, VT, ResVal); @@ -3673,10 +3678,7 @@ static bool OptimizeGEPExpression(GetElementPtrInst *GEPI, // Handle constant subscripts. if (ConstantInt *CI = dyn_cast(Idx)) { if (CI->getZExtValue() == 0) continue; - if (CI->getType()->isSigned()) - ConstantOffset += (int64_t)TD->getTypeSize(Ty)*CI->getSExtValue(); - else - ConstantOffset += TD->getTypeSize(Ty)*CI->getZExtValue(); + ConstantOffset += (int64_t)TD->getTypeSize(Ty)*CI->getSExtValue(); continue; } -- cgit v1.1