From ed592c08e5c1e0b164f606f8e8fb00199e19660c Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Wed, 8 Jul 2009 18:11:30 +0000 Subject: Implement NEON vld1 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrNEON.td | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'lib/Target/ARM/ARMInstrNEON.td') diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index a62597b..e8d3f58 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -111,6 +111,29 @@ def VSTRQ : NI<(outs), (ins QPR:$src, GPR:$addr), [(store (v2f64 QPR:$src), GPR:$addr)]>; +// VLD1 : Vector Load (multiple single elements) +class VLD1D + : NLdSt<(outs DPR:$dst), (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t${dst:dregsingle}, $addr"), + [(set DPR:$dst, (Ty (IntOp addrmode6:$addr, 1)))]>; +class VLD1Q + : NLdSt<(outs QPR:$dst), (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t${dst:dregpair}, $addr"), + [(set QPR:$dst, (Ty (IntOp addrmode6:$addr, 1)))]>; + +def VLD1d8 : VLD1D<"vld1.8", v8i8, int_arm_neon_vldi>; +def VLD1d16 : VLD1D<"vld1.16", v4i16, int_arm_neon_vldi>; +def VLD1d32 : VLD1D<"vld1.32", v2i32, int_arm_neon_vldi>; +def VLD1df : VLD1D<"vld1.32", v2f32, int_arm_neon_vldf>; +def VLD1d64 : VLD1D<"vld1.64", v1i64, int_arm_neon_vldi>; + +def VLD1q8 : VLD1Q<"vld1.8", v16i8, int_arm_neon_vldi>; +def VLD1q16 : VLD1Q<"vld1.16", v8i16, int_arm_neon_vldi>; +def VLD1q32 : VLD1Q<"vld1.32", v4i32, int_arm_neon_vldi>; +def VLD1qf : VLD1Q<"vld1.32", v4f32, int_arm_neon_vldf>; +def VLD1q64 : VLD1Q<"vld1.64", v2i64, int_arm_neon_vldi>; + + //===----------------------------------------------------------------------===// // NEON pattern fragments //===----------------------------------------------------------------------===// -- cgit v1.1