From c2cb3704c1cfe80a3466f222662c690828a89593 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 27 May 2010 22:08:38 +0000 Subject: llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104891 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) (limited to 'lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp') diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index 093f599..fc73938 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -1064,27 +1064,11 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, printOperand(MI, OpNum, O); return false; case 'Q': - // Print the least significant half of a register pair. - if (TM.getTargetData()->isBigEndian()) - break; - printOperand(MI, OpNum, O); - return false; case 'R': - // Print the most significant half of a register pair. - if (TM.getTargetData()->isLittleEndian()) - break; - printOperand(MI, OpNum, O); - return false; case 'H': - break; - } - // Print the second half of a register pair (for 'Q', 'R' or 'H'). - // Verify that this operand has two consecutive registers. - if (!MI->getOperand(OpNum).isReg() || - OpNum+1 == MI->getNumOperands() || - !MI->getOperand(OpNum+1).isReg()) + llvm_unreachable("llvm does not support 'Q', 'R', and 'H' modifiers!"); return true; - ++OpNum; + } } printOperand(MI, OpNum, O); -- cgit v1.1