From 1290ce00a372f10fa1667d3566477f86ede04c73 Mon Sep 17 00:00:00 2001 From: Amaury de la Vieuville Date: Thu, 13 Jun 2013 16:40:51 +0000 Subject: ARM: fix t2am_imm8_offset operand printing for imm=#-0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183913 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'lib/Target/ARM/InstPrinter') diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 7fef795..0b3d266 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -1148,7 +1148,9 @@ void ARMInstPrinter::printT2AddrModeImm8OffsetOperand(const MCInst *MI, const MCOperand &MO1 = MI->getOperand(OpNum); int32_t OffImm = (int32_t)MO1.getImm(); O << ", " << markup(" Date: Tue, 18 Jun 2013 08:03:06 +0000 Subject: ARM: fix thumb literal loads decoding This fixes two previous issues: - Negative offsets were not correctly disassembled - The decoded opcodes were not the right one git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184180 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 28 ++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) (limited to 'lib/Target/ARM/InstPrinter') diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 0b3d266..0931e59 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -315,15 +315,29 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { const MCOperand &MO1 = MI->getOperand(OpNum); - if (MO1.isExpr()) + if (MO1.isExpr()) { O << *MO1.getExpr(); - else if (MO1.isImm()) { - O << markup("]>", "]"); + return; } - else - llvm_unreachable("Unknown LDR label operand?"); + + O << markup(""); + } else { + O << markup(""); + } + O << "]" << markup(">"); } // so_reg is a 4-operand unit corresponding to register forms of the A5.1 -- cgit v1.1 From f8b60d6f30a8f25c84a71d36ff3a86fe1f52f671 Mon Sep 17 00:00:00 2001 From: Amaury de la Vieuville Date: Tue, 18 Jun 2013 08:12:51 +0000 Subject: ARM: add operands pre-writeback variants when needed git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184181 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 50 +++++++++++++++------------ lib/Target/ARM/InstPrinter/ARMInstPrinter.h | 2 ++ 2 files changed, 30 insertions(+), 22 deletions(-) (limited to 'lib/Target/ARM/InstPrinter') diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 0931e59..62394fa 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -1079,6 +1079,7 @@ void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, O << "]" << markup(">"); } +template void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { @@ -1089,22 +1090,25 @@ void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI, printRegName(O, MO1.getReg()); int32_t OffImm = (int32_t)MO2.getImm(); + bool isSub = OffImm < 0; // Don't print +0. - if (OffImm != 0) - O << ", "; - if (OffImm != 0 && UseMarkup) - O << " 0) - O << "#" << OffImm; - if (OffImm != 0 && UseMarkup) - O << ">"; + OffImm = 0; + if (isSub) { + O << ", " + << markup(""); + } else if (AlwaysPrintImm0 || OffImm > 0) { + O << ", " + << markup(""); + } O << "]" << markup(">"); } +template void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { @@ -1120,22 +1124,24 @@ void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI, printRegName(O, MO1.getReg()); int32_t OffImm = (int32_t)MO2.getImm(); + bool isSub = OffImm < 0; assert(((OffImm & 0x3) == 0) && "Not a valid immediate!"); // Don't print +0. - if (OffImm != 0) - O << ", "; - if (OffImm != 0 && UseMarkup) - O << " 0) - O << "#" << OffImm; - if (OffImm != 0 && UseMarkup) - O << ">"; + OffImm = 0; + if (isSub) { + O << ", " + << markup(""); + } else if (AlwaysPrintImm0 || OffImm > 0) { + O << ", " + << markup(""); + } O << "]" << markup(">"); } diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h index 5a64348..a3ea640 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.h +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.h @@ -97,8 +97,10 @@ public: template void printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + template void printT2AddrModeImm8Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); + template void printT2AddrModeImm8s4Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printT2AddrModeImm0_1020s4Operand(const MCInst *MI, unsigned OpNum, -- cgit v1.1 From 4ee72398a15cd7b8e217bb3d34a4e9e0e72caca1 Mon Sep 17 00:00:00 2001 From: Amaury de la Vieuville Date: Mon, 24 Jun 2013 09:11:53 +0000 Subject: ARM: fix thumb1 nop decoding In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8. However the disassembler should not use this alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184703 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 9 --------- 1 file changed, 9 deletions(-) (limited to 'lib/Target/ARM/InstPrinter') diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 62394fa..8734e44 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -243,15 +243,6 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O, return; } - // Thumb1 NOP - if (Opcode == ARM::tMOVr && MI->getOperand(0).getReg() == ARM::R8 && - MI->getOperand(1).getReg() == ARM::R8) { - O << "\tnop"; - printPredicateOperand(MI, 2, O); - printAnnotation(O, Annot); - return; - } - // Combine 2 GPRs from disassember into a GPRPair to match with instr def. // ldrexd/strexd require even/odd GPR pair. To enforce this constraint, // a single GPRPair reg operand is used in the .td file to replace the two -- cgit v1.1 From 6e0857e0b6b241e8b698417659a5821f15290a63 Mon Sep 17 00:00:00 2001 From: Amaury de la Vieuville Date: Wed, 26 Jun 2013 13:39:07 +0000 Subject: ARM: operands should be explicit when disassembled git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184943 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'lib/Target/ARM/InstPrinter') diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 8734e44..1797c6c 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -1176,19 +1176,14 @@ void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI, assert(((OffImm & 0x3) == 0) && "Not a valid immediate!"); - // Don't print +0. - if (OffImm != 0) - O << ", "; - if (OffImm != 0 && UseMarkup) - O << " 0) + else O << "#" << OffImm; - if (OffImm != 0 && UseMarkup) - O << ">"; + O << markup(">"); } void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI, -- cgit v1.1 From b81b477cd4392a51112c3af0659ea9fc176e74f1 Mon Sep 17 00:00:00 2001 From: Mihai Popa Date: Wed, 3 Jul 2013 09:21:44 +0000 Subject: This corrects the implementation of Thumb ADR instruction. There are three issues: 1. it should accept only 4-byte aligned addresses 2. the maximum offset should be 1020 3. it should be encoded with the offset scaled by two bits git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185528 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 3 ++- lib/Target/ARM/InstPrinter/ARMInstPrinter.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'lib/Target/ARM/InstPrinter') diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 1797c6c..97da232 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -900,6 +900,7 @@ void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum, llvm_unreachable("Unhandled PC-relative pseudo-instruction!"); } +template void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { const MCOperand &MO = MI->getOperand(OpNum); @@ -909,7 +910,7 @@ void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum, return; } - int32_t OffImm = (int32_t)MO.getImm(); + int32_t OffImm = (int32_t)MO.getImm() << scale; O << markup(" void printAdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printThumbSRImm(const MCInst *MI, unsigned OpNum, raw_ostream &O); -- cgit v1.1