From ad2715e0d787feaecb66060ea638e373dee7f6fb Mon Sep 17 00:00:00 2001 From: Scott Michel Date: Wed, 5 Mar 2008 23:02:02 +0000 Subject: - Fix support for "special" i64 immediates that can be loaded using IL, ILA, et. al. v2i64 and i64 are now supported by the select bits (SELB) instruction. - Add missing comparison operations (testcase forthcoming) - More multiclass refactoring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47973 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/CellSPU/SPUNodes.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/Target/CellSPU/SPUNodes.td') diff --git a/lib/Target/CellSPU/SPUNodes.td b/lib/Target/CellSPU/SPUNodes.td index c2db667..e390345 100644 --- a/lib/Target/CellSPU/SPUNodes.td +++ b/lib/Target/CellSPU/SPUNodes.td @@ -59,7 +59,7 @@ def SPUv4i32_binop: SDTypeProfile<1, 2, [ // FSMBI type constraints: There are several variations for the various // vector types (this avoids having to bit_convert all over the place.) def SPUfsmbi_type: SDTypeProfile<1, 1, [ - SDTCisVT<1, i32>]>; + /* SDTCisVT<1, i32> */ SDTCisInt<1>]>; // SELB type constraints: def SPUselb_type: SDTypeProfile<1, 3, [ -- cgit v1.1