From 42aa501491fc94923f5c12725aaede67687801e8 Mon Sep 17 00:00:00 2001 From: Scott Michel Date: Wed, 5 Dec 2007 21:23:16 +0000 Subject: Minor updates: - Fix typo in SPUCallingConv.td - Credit myself for CellSPU work - Add CellSPU to 'all' host target list git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44627 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/CellSPU/SPUCallingConv.td | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'lib/Target/CellSPU') diff --git a/lib/Target/CellSPU/SPUCallingConv.td b/lib/Target/CellSPU/SPUCallingConv.td index 93a4000..47f8f3c 100644 --- a/lib/Target/CellSPU/SPUCallingConv.td +++ b/lib/Target/CellSPU/SPUCallingConv.td @@ -48,7 +48,6 @@ def CC_SPU : CallingConv<[ // The first 12 Vector arguments are passed in altivec registers. CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10,V11,V12,V13]>> - */ /* // Integer/FP values get stored in stack slots that are 8 bytes in size and // 8-byte aligned if there are no more registers to hold them. @@ -56,6 +55,6 @@ def CC_SPU : CallingConv<[ // Vectors get 16-byte stack slots that are 16-byte aligned. CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], - CCAssignToStack<16, 16>> + CCAssignToStack<16, 16>>*/ ]>; */ -- cgit v1.1