From 5114226c1896f250be8881adf67d55a7e54b50fc Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Fri, 29 Mar 2013 19:17:42 +0000 Subject: [mips] Define a function which returns the GPR register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178359 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsSERegisterInfo.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'lib/Target/Mips/MipsSERegisterInfo.cpp') diff --git a/lib/Target/Mips/MipsSERegisterInfo.cpp b/lib/Target/Mips/MipsSERegisterInfo.cpp index a39b393..9696738 100644 --- a/lib/Target/Mips/MipsSERegisterInfo.cpp +++ b/lib/Target/Mips/MipsSERegisterInfo.cpp @@ -54,6 +54,15 @@ requiresFrameIndexScavenging(const MachineFunction &MF) const { return true; } +const TargetRegisterClass * +MipsSERegisterInfo::intRegClass(unsigned Size) const { + if (Size == 4) + return &Mips::CPURegsRegClass; + + assert(Size == 8); + return &Mips::CPU64RegsRegClass; +} + void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, int FrameIndex, uint64_t StackSize, -- cgit v1.1