From 4029c3feed5c9a5b0793e3da140ecaabef19e3fe Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Thu, 18 Apr 2013 22:54:25 +0000 Subject: Disable PPC comparison optimization by default This seems to cause a stage-2 LLVM compile failure (by crashing TableGen); do I'm disabling this for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179807 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.cpp | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'lib/Target/PowerPC/PPCInstrInfo.cpp') diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index b78f071..cd50bb5 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -42,6 +42,9 @@ static cl:: opt DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden, cl::desc("Disable analysis for CTR loops")); +static cl::opt DisableCmpOpt("disable-ppc-cmp-opt", cl::init(true), +cl::desc("Disable compare instruction optimization"), cl::Hidden); + PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm) : PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP), TM(tm), RI(*TM.getSubtargetImpl(), *this) {} @@ -1088,6 +1091,9 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const { + if (DisableCmpOpt) + return false; + int OpC = CmpInstr->getOpcode(); unsigned CRReg = CmpInstr->getOperand(0).getReg(); bool isFP = OpC == PPC::FCMPUS || OpC == PPC::FCMPUD; -- cgit v1.1