From af89fa609bce1004c9ea9737d9fdb32f4224ef1c Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 16 Jun 2006 18:50:48 +0000 Subject: Remove the -darwin and -aix llc options, inferring darwinism and aixism from the target triple & subtarget info. woo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCRegisterInfo.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'lib/Target/PowerPC/PPCRegisterInfo.td') diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td index 9cd2145..5c6ac24 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.td +++ b/lib/Target/PowerPC/PPCRegisterInfo.td @@ -215,7 +215,7 @@ def GPRC : RegisterClass<"PPC", [i32], 32, let MethodBodies = [{ GPRCClass::iterator GPRCClass::allocation_order_begin(MachineFunction &MF) const { - return begin() + ((TargetAIX == PPCTarget) ? 1 : 0); + return begin(); } GPRCClass::iterator GPRCClass::allocation_order_end(MachineFunction &MF) const { @@ -238,7 +238,7 @@ def G8RC : RegisterClass<"PPC", [i64], 64, let MethodBodies = [{ G8RCClass::iterator G8RCClass::allocation_order_begin(MachineFunction &MF) const { - return begin() + ((TargetAIX == PPCTarget) ? 1 : 0); + return begin(); } G8RCClass::iterator G8RCClass::allocation_order_end(MachineFunction &MF) const { -- cgit v1.1