From 51f558c9aed3bf74c2e8f3ff3bf365c94637ecdf Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Wed, 3 Jul 2013 18:29:47 +0000 Subject: [PowerPC] Support lmw/stmw in the asm parser This adds support for the load/store multiple instructions, currently used by the asm parser only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185564 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.td | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'lib/Target/PowerPC') diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 9a8e33b..022c151 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -1378,6 +1378,10 @@ def LFIWZX : XForm_25<31, 887, (outs f8rc:$frD), (ins memrr:$src), [(set f64:$frD, (PPClfiwzx xoaddr:$src))]>; } +// Load Multiple +def LMW : DForm_1<46, (outs gprc:$rD), (ins memri:$src), + "lmw $rD, $src", LdStLMW, []>; + //===----------------------------------------------------------------------===// // PPC32 Store Instructions. // @@ -1508,6 +1512,10 @@ def : Pat<(pre_store f32:$rS, iPTR:$ptrreg, iPTR:$ptroff), def : Pat<(pre_store f64:$rS, iPTR:$ptrreg, iPTR:$ptroff), (STFDUX $rS, $ptrreg, $ptroff)>; +// Store Multiple +def STMW : DForm_1<47, (outs), (ins gprc:$rS, memri:$dst), + "stmw $rS, $dst", LdStLMW, []>; + def SYNC : XForm_24_sync<31, 598, (outs), (ins i32imm:$L), "sync $L", LdStSync, []>; def : Pat<(int_ppc_sync), (SYNC 0)>; -- cgit v1.1