From af2ea2a4fb785652ec79dbe179c499823ea45f63 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 31 Jul 2013 20:43:03 +0000
Subject: Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"

This reverts commit 3f1de26cb5cc0543a6a1d71259a7a39d97139051.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187524 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/R600/R600InstrFormats.td | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'lib/Target/R600/R600InstrFormats.td')

diff --git a/lib/Target/R600/R600InstrFormats.td b/lib/Target/R600/R600InstrFormats.td
index 514ad4a..2d72404 100644
--- a/lib/Target/R600/R600InstrFormats.td
+++ b/lib/Target/R600/R600InstrFormats.td
@@ -16,6 +16,7 @@ class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
     : AMDGPUInst <outs, ins, asm, pattern> {
 
   field bits<64> Inst;
+  bit TransOnly = 0;
   bit Trig = 0;
   bit Op3 = 0;
   bit isVector = 0;
@@ -36,6 +37,7 @@ class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
   let Pattern = pattern;
   let Itinerary = itin;
 
+  let TSFlags{0} = TransOnly;
   let TSFlags{4} = Trig;
   let TSFlags{5} = Op3;
 
-- 
cgit v1.1