From 58184e6878fdab651bc7c9a59dab2687ca82ede2 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 18 Oct 2007 21:29:24 +0000 Subject: Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Sparc/SparcRegisterInfo.cpp | 8 ++++---- lib/Target/Sparc/SparcRegisterInfo.h | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'lib/Target/Sparc') diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index 7129f43..3055bf9 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -49,9 +49,9 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, } void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg, - SmallVector Addr, + SmallVectorImpl Addr, const TargetRegisterClass *RC, - SmallVector &NewMIs) const { + SmallVectorImpl &NewMIs) const { unsigned Opc = 0; if (RC == SP::IntRegsRegisterClass) Opc = SP::STri; @@ -91,9 +91,9 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, } void SparcRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVector Addr, + SmallVectorImpl Addr, const TargetRegisterClass *RC, - SmallVector &NewMIs) const { + SmallVectorImpl &NewMIs) const { unsigned Opc = 0; if (RC == SP::IntRegsRegisterClass) Opc = SP::LDri; diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h index 39cf616..15a624f 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.h +++ b/lib/Target/Sparc/SparcRegisterInfo.h @@ -36,9 +36,9 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo { const TargetRegisterClass *RC) const; void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, - SmallVector Addr, + SmallVectorImpl Addr, const TargetRegisterClass *RC, - SmallVector &NewMIs) const; + SmallVectorImpl &NewMIs) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, @@ -46,9 +46,9 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo { const TargetRegisterClass *RC) const; void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVector Addr, + SmallVectorImpl Addr, const TargetRegisterClass *RC, - SmallVector &NewMIs) const; + SmallVectorImpl &NewMIs) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, -- cgit v1.1