From 09a0de11213ce1db9f2b528a549ee09619336a96 Mon Sep 17 00:00:00 2001
From: Anton Korobeynikov <asl@math.spbu.ru>
Date: Thu, 16 Jul 2009 14:05:00 +0000
Subject: Add z9 and z10 target processors. Mark z10-only instructions as such.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/SystemZ/SystemZ.td | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'lib/Target/SystemZ/SystemZ.td')

diff --git a/lib/Target/SystemZ/SystemZ.td b/lib/Target/SystemZ/SystemZ.td
index a062dc6..7b0a9bd 100644
--- a/lib/Target/SystemZ/SystemZ.td
+++ b/lib/Target/SystemZ/SystemZ.td
@@ -18,9 +18,8 @@ include "llvm/Target/Target.td"
 //===----------------------------------------------------------------------===//
 // Subtarget Features. 
 //===----------------------------------------------------------------------===//
-def FeatureX
- : SubtargetFeature<"dummy", "DummyFeature", "true",
-                    "Some feature">;
+def FeatureZ10 : SubtargetFeature<"z10", "HasZ10Insts", "true",
+                                  "Support Z10 instructions">;
 
 //===----------------------------------------------------------------------===//
 // SystemZ supported processors.
@@ -28,7 +27,8 @@ def FeatureX
 class Proc<string Name, list<SubtargetFeature> Features>
  : Processor<Name, NoItineraries, Features>;
 
-def : Proc<"generic",         []>;
+def : Proc<"z9",  []>;
+def : Proc<"z10", [FeatureZ10]>;
 
 //===----------------------------------------------------------------------===//
 // Register File Description
-- 
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