From d8cc2722a46c65db1ea2f4c77d2a04a5a0378edb Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 5 Oct 2010 06:47:35 +0000 Subject: move some instructions from Instr64Bit -> InstrInfo. bswap32 doesn't read eflags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115604 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrCompiler.td | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'lib/Target/X86/X86InstrCompiler.td') diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td index d1610b9..db6e5a4 100644 --- a/lib/Target/X86/X86InstrCompiler.td +++ b/lib/Target/X86/X86InstrCompiler.td @@ -981,6 +981,24 @@ def : Pat<(i64 (anyext GR16:$src)), (MOVZX64rr16 GR16 :$src)>; def : Pat<(i64 (anyext GR32:$src)), (SUBREG_TO_REG (i64 0), GR32:$src, sub_32bit)>; + +// Any instruction that defines a 32-bit result leaves the high half of the +// register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may +// be copying from a truncate. And x86's cmov doesn't do anything if the +// condition is false. But any other 32-bit operation will zero-extend +// up to 64 bits. +def def32 : PatLeaf<(i32 GR32:$src), [{ + return N->getOpcode() != ISD::TRUNCATE && + N->getOpcode() != TargetOpcode::EXTRACT_SUBREG && + N->getOpcode() != ISD::CopyFromReg && + N->getOpcode() != X86ISD::CMOV; +}]>; + +// In the case of a 32-bit def that is known to implicitly zero-extend, +// we can use a SUBREG_TO_REG. +def : Pat<(i64 (zext def32:$src)), + (SUBREG_TO_REG (i64 0), GR32:$src, sub_32bit)>; + //===----------------------------------------------------------------------===// // Some peepholes //===----------------------------------------------------------------------===// -- cgit v1.1