From 9fd58f05d5f87ca4c4113eb3f78e1932a4e2f8d5 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Wed, 29 Feb 2012 19:44:41 +0000 Subject: Intel Atom instruction itineraries for mov sign extension and mov zero extension. Patch by Tyler Nowicki! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151743 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86Schedule.td | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'lib/Target/X86/X86Schedule.td') diff --git a/lib/Target/X86/X86Schedule.td b/lib/Target/X86/X86Schedule.td index 9692833..d6d0149 100644 --- a/lib/Target/X86/X86Schedule.td +++ b/lib/Target/X86/X86Schedule.td @@ -103,6 +103,17 @@ def IIC_CALL_FAR_PTR : InstrItinClass; // ret def IIC_RET : InstrItinClass; def IIC_RET_IMM : InstrItinClass; +//sign extension movs +def IIC_MOVSX : InstrItinClass; +def IIC_MOVSX_R16_R8 : InstrItinClass; +def IIC_MOVSX_R16_M8 : InstrItinClass; +def IIC_MOVSX_R16_R16 : InstrItinClass; +def IIC_MOVSX_R32_R32 : InstrItinClass; +//zero extension movs +def IIC_MOVZX : InstrItinClass; +def IIC_MOVZX_R16_R8 : InstrItinClass; +def IIC_MOVZX_R16_M8 : InstrItinClass; + // SSE scalar/parallel binary operations def IIC_SSE_ALU_F32S_RR : InstrItinClass; def IIC_SSE_ALU_F32S_RM : InstrItinClass; -- cgit v1.1