From c909950c384e8234a7b3c5a76b7f79e3f7012ceb Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 20 Apr 2012 06:31:50 +0000 Subject: Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86VZeroUpper.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/Target/X86/X86VZeroUpper.cpp') diff --git a/lib/Target/X86/X86VZeroUpper.cpp b/lib/Target/X86/X86VZeroUpper.cpp index 2fd78a7..65271db 100644 --- a/lib/Target/X86/X86VZeroUpper.cpp +++ b/lib/Target/X86/X86VZeroUpper.cpp @@ -145,7 +145,7 @@ bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) { // to insert any VZEROUPPER instructions. This is constant-time, so it is // cheap in the common case of no ymm use. bool YMMUsed = false; - const TargetRegisterClass *RC = X86::VR256RegisterClass; + const TargetRegisterClass *RC = &X86::VR256RegClass; for (TargetRegisterClass::iterator i = RC->begin(), e = RC->end(); i != e; i++) { if (MRI.isPhysRegUsed(*i)) { -- cgit v1.1