From 48884cd80b52be1528618f2e9b3425ac24e7b5ca Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 25 Aug 2007 00:47:38 +0000
Subject: rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
 changing the interface to allow for future changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86ISelLowering.cpp | 49 +++++++++++++++++++++++++-------------
 lib/Target/X86/X86ISelLowering.h   | 12 ++++++----
 2 files changed, 39 insertions(+), 22 deletions(-)

(limited to 'lib/Target/X86')

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index f32e6f6..6673c5f 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5002,29 +5002,38 @@ X86TargetLowering::getConstraintType(const std::string &Constraint) const {
   return TargetLowering::getConstraintType(Constraint);
 }
 
-/// isOperandValidForConstraint - Return the specified operand (possibly
-/// modified) if the specified SDOperand is valid for the specified target
-/// constraint letter, otherwise return null.
-SDOperand X86TargetLowering::
-isOperandValidForConstraint(SDOperand Op, char Constraint, SelectionDAG &DAG) {
+/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
+/// vector.  If it is invalid, don't add anything to Ops.
+void X86TargetLowering::LowerAsmOperandForConstraint(SDOperand Op,
+                                                     char Constraint,
+                                                     std::vector<SDOperand>&Ops,
+                                                     SelectionDAG &DAG) {
+  SDOperand Result(0, 0);
+  
   switch (Constraint) {
   default: break;
   case 'I':
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
-      if (C->getValue() <= 31)
-        return DAG.getTargetConstant(C->getValue(), Op.getValueType());
+      if (C->getValue() <= 31) {
+        Result = DAG.getTargetConstant(C->getValue(), Op.getValueType());
+        break;
+      }
     }
-    return SDOperand(0,0);
+    return;
   case 'N':
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
-      if (C->getValue() <= 255)
-        return DAG.getTargetConstant(C->getValue(), Op.getValueType());
+      if (C->getValue() <= 255) {
+        Result = DAG.getTargetConstant(C->getValue(), Op.getValueType());
+        break;
+      }
     }
-    return SDOperand(0,0);
+    return;
   case 'i': {
     // Literal immediates are always ok.
-    if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Op))
-      return DAG.getTargetConstant(CST->getValue(), Op.getValueType());
+    if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Op)) {
+      Result = DAG.getTargetConstant(CST->getValue(), Op.getValueType());
+      break;
+    }
 
     // If we are in non-pic codegen mode, we allow the address of a global (with
     // an optional displacement) to be used with 'i'.
@@ -5054,18 +5063,24 @@ isOperandValidForConstraint(SDOperand Op, char Constraint, SelectionDAG &DAG) {
       // match.
       if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), getTargetMachine(),
                                          false))
-        return SDOperand(0, 0);
+        return;
 
       Op = DAG.getTargetGlobalAddress(GA->getGlobal(), GA->getValueType(0),
                                       Offset);
-      return Op;
+      Result = Op;
+      break;
     }
 
     // Otherwise, not valid for this mode.
-    return SDOperand(0, 0);
+    return;
   }
   }
-  return TargetLowering::isOperandValidForConstraint(Op, Constraint, DAG);
+  
+  if (Result.Val) {
+    Ops.push_back(Result);
+    return;
+  }
+  return TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
 }
 
 std::vector<unsigned> X86TargetLowering::
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 022005d..24ca1ea 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -330,11 +330,13 @@ namespace llvm {
     std::vector<unsigned> 
       getRegClassForInlineAsmConstraint(const std::string &Constraint,
                                         MVT::ValueType VT) const;
-    /// isOperandValidForConstraint - Return the specified operand (possibly
-    /// modified) if the specified SDOperand is valid for the specified target
-    /// constraint letter, otherwise return null.
-    SDOperand isOperandValidForConstraint(SDOperand Op, char ConstraintLetter,
-                                          SelectionDAG &DAG);
+
+    /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
+    /// vector.  If it is invalid, don't add anything to Ops.
+    virtual void LowerAsmOperandForConstraint(SDOperand Op,
+                                              char ConstraintLetter,
+                                              std::vector<SDOperand> &Ops,
+                                              SelectionDAG &DAG);
     
     /// getRegForInlineAsmConstraint - Given a physical register constraint
     /// (e.g. {edx}), return the register number and the register class for the
-- 
cgit v1.1