From be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Wed, 29 Apr 2009 00:15:41 +0000 Subject: Second attempt: Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h | 6 +++--- lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp | 8 +++++--- lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h | 6 +++--- lib/Target/X86/X86.h | 4 ++-- lib/Target/X86/X86ISelDAGToDAG.cpp | 16 +++++++-------- lib/Target/X86/X86TargetMachine.cpp | 27 ++++++++++++++------------ lib/Target/X86/X86TargetMachine.h | 14 ++++++------- 7 files changed, 43 insertions(+), 38 deletions(-) (limited to 'lib/Target/X86') diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h index 65af91a..ecb0f4d 100644 --- a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h +++ b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h @@ -33,9 +33,9 @@ class VISIBILITY_HIDDEN X86ATTAsmPrinter : public AsmPrinter { MachineModuleInfo *MMI; const X86Subtarget *Subtarget; public: - X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V), DW(0), MMI(0) { + explicit X86ATTAsmPrinter(raw_ostream &O, X86TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V), DW(0), MMI(0) { Subtarget = &TM.getSubtarget(); } diff --git a/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp index d64aaa6..85c5471 100644 --- a/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp +++ b/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp @@ -25,13 +25,15 @@ using namespace llvm; /// FunctionPass *llvm::createX86CodePrinterPass(raw_ostream &o, X86TargetMachine &tm, - bool fast, bool verbose) { + unsigned OptLevel, bool verbose) { const X86Subtarget *Subtarget = &tm.getSubtarget(); if (Subtarget->isFlavorIntel()) { - return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + return new X86IntelAsmPrinter(o, tm, tm.getTargetAsmInfo(), + OptLevel, verbose); } else { - return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), fast, verbose); + return new X86ATTAsmPrinter(o, tm, tm.getTargetAsmInfo(), + OptLevel, verbose); } } diff --git a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h index 489d946..054cd9c 100644 --- a/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h +++ b/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h @@ -25,9 +25,9 @@ namespace llvm { struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter { - X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, - const TargetAsmInfo *T, bool F, bool V) - : AsmPrinter(O, TM, T, F, V) {} + explicit X86IntelAsmPrinter(raw_ostream &O, X86TargetMachine &TM, + const TargetAsmInfo *T, unsigned OL, bool V) + : AsmPrinter(O, TM, T, OL, V) {} virtual const char *getPassName() const { return "X86 Intel-Style Assembly Printer"; diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index 72ff02b..9dad017 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -25,7 +25,7 @@ class raw_ostream; /// createX86ISelDag - This pass converts a legalized DAG into a /// X86-specific DAG, ready for instruction scheduling. /// -FunctionPass *createX86ISelDag(X86TargetMachine &TM, bool Fast); +FunctionPass *createX86ISelDag(X86TargetMachine &TM, unsigned OptSize); /// createX86FloatingPointStackifierPass - This function returns a pass which /// converts floating point register references and pseudo instructions into @@ -44,7 +44,7 @@ FunctionPass *createX87FPRegKillInserterPass(); /// FunctionPass *createX86CodePrinterPass(raw_ostream &o, X86TargetMachine &tm, - bool fast, bool Verbose); + unsigned OptLevel, bool Verbose); /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code /// to the specified MCE object. diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 4b698ce..7da43e9 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -134,8 +134,8 @@ namespace { bool OptForSize; public: - X86DAGToDAGISel(X86TargetMachine &tm, bool fast) - : SelectionDAGISel(tm, fast), + explicit X86DAGToDAGISel(X86TargetMachine &tm, unsigned OptLevel) + : SelectionDAGISel(tm, OptLevel), TM(tm), X86Lowering(*TM.getTargetLowering()), Subtarget(&TM.getSubtarget()), OptForSize(false) {} @@ -306,7 +306,7 @@ static inline bool isNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse) { bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U, SDNode *Root) const { - if (Fast) return false; + if (OptLevel == 0) return false; if (U == Root) switch (U->getOpcode()) { @@ -512,7 +512,7 @@ static bool isCalleeLoad(SDValue Callee, SDValue &Chain) { /// PreprocessForRMW - Preprocess the DAG to make instruction selection better. -/// This is only run if not in -fast mode (aka -O0). +/// This is only run if not in -O0 mode. /// This allows the instruction selector to pick more read-modify-write /// instructions. This is a common case: /// @@ -714,10 +714,10 @@ void X86DAGToDAGISel::InstructionSelect() { OptForSize = F->hasFnAttr(Attribute::OptimizeForSize); DEBUG(BB->dump()); - if (!Fast) + if (OptLevel != 0) PreprocessForRMW(); - // FIXME: This should only happen when not -fast. + // FIXME: This should only happen when not compiled with -O0. PreprocessForFPConvert(); // Codegen the basic block. @@ -1744,6 +1744,6 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, /// createX86ISelDag - This pass converts a legalized DAG into a /// X86-specific DAG, ready for instruction scheduling. /// -FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, bool Fast) { - return new X86DAGToDAGISel(TM, Fast); +FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM, unsigned OptLevel) { + return new X86DAGToDAGISel(TM, OptLevel); } diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index a20e1c4..df086e8 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -180,9 +180,9 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, // Pass Pipeline Configuration //===----------------------------------------------------------------------===// -bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { +bool X86TargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) { // Install an instruction selector. - PM.add(createX86ISelDag(*this, Fast)); + PM.add(createX86ISelDag(*this, OptLevel)); // If we're using Fast-ISel, clean up the mess. if (EnableFastISel) @@ -194,27 +194,29 @@ bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) { return false; } -bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, bool Fast) { +bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, unsigned OptLevel) { // Calculate and set max stack object alignment early, so we can decide // whether we will need stack realignment (and thus FP). PM.add(createX86MaxStackAlignmentCalculatorPass()); return false; // -print-machineinstr shouldn't print after this. } -bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) { +bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, unsigned OptLevel) { PM.add(createX86FloatingPointStackifierPass()); return true; // -print-machineinstr should print after this. } -bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, - bool Verbose, raw_ostream &Out) { +bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, + unsigned OptLevel, + bool Verbose, + raw_ostream &Out) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose)); + PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); return false; } -bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, +bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE) { // FIXME: Move this to TargetJITInfo! // On Darwin, do not override 64-bit setting made in X86TargetMachine(). @@ -236,19 +238,20 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast, if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; } -bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, - bool DumpAsm, MachineCodeEmitter &MCE) { +bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, + unsigned OptLevel, bool DumpAsm, + MachineCodeEmitter &MCE) { PM.add(createX86CodeEmitterPass(*this, MCE)); if (DumpAsm) { assert(AsmPrinterCtor && "AsmPrinter was not linked in"); if (AsmPrinterCtor) - PM.add(AsmPrinterCtor(errs(), *this, Fast, true)); + PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); } return false; diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index fdc00fa..4b4e26f 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -45,7 +45,7 @@ protected: // set this functions to ctor pointer at startup time if they are linked in. typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o, X86TargetMachine &tm, - bool fast, bool verbose); + unsigned OptLevel, bool verbose); static AsmPrinterCtorFn AsmPrinterCtor; public: @@ -74,14 +74,14 @@ public: } // Set up the pass pipeline. - virtual bool addInstSelector(PassManagerBase &PM, bool Fast); - virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast); - virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast); - virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, + virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPreRegAlloc(PassManagerBase &PM, unsigned OptLevel); + virtual bool addPostRegAlloc(PassManagerBase &PM, unsigned OptLevel); + virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel, bool Verbose, raw_ostream &Out); - virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); - virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast, + virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel, bool DumpAsm, MachineCodeEmitter &MCE); /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are -- cgit v1.1