From 038f3e31276f8cc86d91d0e4513e1a3ddb8509ba Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Mon, 3 Sep 2012 18:47:45 +0000 Subject: [ms-inline asm] Add an interface to the GetMCInstOperandNum() function in the MCTargetAsmParser class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163122 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 ++++++ lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp | 5 +++++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 13 +++++++++++++ lib/Target/X86/AsmParser/X86AsmParser.cpp | 6 ++++++ 4 files changed, 30 insertions(+) (limited to 'lib/Target') diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index fe11bec..bdb20e8 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -262,6 +262,12 @@ public: bool MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl &Operands, MCStreamer &Out); + + unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, + const SmallVectorImpl &Operands, + unsigned OperandNum) { + return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum); + } }; } // end anonymous namespace diff --git a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp index 1ee6e2d..e81943c 100644 --- a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp +++ b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp @@ -56,6 +56,11 @@ class MBlazeAsmParser : public MCTargetAsmParser { /// } + unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, + const SmallVectorImpl &Operands, + unsigned OperandNum) { + return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum); + } public: MBlazeAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser) diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 43bd345..deef844 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -37,6 +37,11 @@ class MipsAsmParser : public MCTargetAsmParser { bool ParseDirective(AsmToken DirectiveID); OperandMatchResultTy parseMemOperand(SmallVectorImpl&); + + unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, + const SmallVectorImpl &Operands, + unsigned OperandNum); + public: MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser) : MCTargetAsmParser() { @@ -96,6 +101,14 @@ public: }; } +unsigned MipsAsmParser:: +GetMCInstOperandNum(unsigned Kind, MCInst &Inst, + const SmallVectorImpl &Operands, + unsigned OperandNum) { + assert (0 && "GetMCInstOperandNum() not supported by the Mips target."); + return 0; +} + bool MipsAsmParser:: MatchAndEmitInstruction(SMLoc IDLoc, SmallVectorImpl &Operands, diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 3a1aa41..6d6e7d1 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -73,6 +73,12 @@ private: unsigned &OrigErrorInfo, bool matchingInlineAsm = false); + unsigned GetMCInstOperandNum(unsigned Kind, MCInst &Inst, + const SmallVectorImpl &Operands, + unsigned OperandNum) { + return GetMCInstOperandNumImpl(Kind, Inst, Operands, OperandNum); + } + /// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi) /// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode. bool isSrcOp(X86Operand &Op); -- cgit v1.1