From 000604afd45e9f729cf6559cd5b4d33af0cddb02 Mon Sep 17 00:00:00 2001 From: Bruno Cardoso Lopes Date: Tue, 6 Nov 2007 03:15:20 +0000 Subject: Better processor definition git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43749 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/Mips.td | 6 ++++-- lib/Target/Mips/MipsSubtarget.cpp | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'lib') diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 8beb3fb..c4b40e2 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -33,6 +33,7 @@ def MipsInstrInfo : InstrInfo { // CPU Directives // //===----------------------------------------------------------------------===// +// Not currently supported, but work as SubtargetFeature placeholder. def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", "MipsIII ISA Support">; @@ -40,8 +41,9 @@ def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", // Mips processors supported. //===----------------------------------------------------------------------===// -def : Processor<"generic", MipsGenericItineraries, []>; -//def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>; +def : Processor<"mips1", MipsGenericItineraries, []>; +def : Processor<"r2000", MipsGenericItineraries, []>; +def : Processor<"r3000", MipsGenericItineraries, []>; def Mips : Target { let InstructionSet = MipsInstrInfo; diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 4665279..d7dd53b 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -20,7 +20,7 @@ MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M, const std::string &FS) : IsMipsIII(false) { - std::string CPU = "generic"; + std::string CPU = "mips1"; // Parse features string. ParseSubtargetFeatures(FS, CPU); -- cgit v1.1