From 0da10cf44d0f22111dae728bb535ade2283d976b Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Mon, 29 Aug 2011 19:36:44 +0000 Subject: Improve handling of #-0 offsets for many more pre-indexed addressing modes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 13 +++++++++---- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 4 +++- lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 4 +++- 3 files changed, 15 insertions(+), 6 deletions(-) (limited to 'lib') diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 2c7accd..443e544 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -638,7 +638,8 @@ public: // Immediate offset in range [-1020, 1020] and a multiple of 4. if (!Mem.OffsetImm) return true; int64_t Val = Mem.OffsetImm->getValue(); - return Val >= -1020 && Val <= 1020 && ((Val & 3) == 0); + return (Val >= -1020 && Val <= 1020 && ((Val & 3) == 0)) || + Val == INT32_MIN; } bool isMemRegOffset() const { if (Kind != Memory || !Mem.OffsetRegNum) @@ -709,7 +710,7 @@ public: // Immediate offset in range [-4095, 4095]. if (!Mem.OffsetImm) return true; int64_t Val = Mem.OffsetImm->getValue(); - return Val > -4096 && Val < 4096; + return (Val > -4096 && Val < 4096) || (Val == INT32_MIN); } bool isPostIdxImm8() const { if (Kind != Immediate) @@ -2565,8 +2566,7 @@ parseMemory(SmallVectorImpl &Operands) { Parser.Lex(); // Eat the '#'. E = Parser.getTok().getLoc(); - // FIXME: Special case #-0 so we can correctly set the U bit. - + bool isNegative = getParser().getTok().is(AsmToken::Minus); const MCExpr *Offset; if (getParser().ParseExpression(Offset)) return true; @@ -2578,6 +2578,11 @@ parseMemory(SmallVectorImpl &Operands) { if (!CE) return Error (E, "constant expression expected"); + // If the constant was #-0, represent it as INT32_MIN. + int32_t Val = CE->getValue(); + if (isNegative && Val == 0) + CE = MCConstantExpr::Create(INT32_MIN, getContext()); + // Now we should have the closing ']' E = Parser.getTok().getLoc(); if (Parser.getTok().isNot(AsmToken::RBrac)) diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 8b44aa2..c421f1c 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -446,7 +446,9 @@ void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum, O << "[" << getRegisterName(MO1.getReg()); - if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) { + unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm()); + unsigned Op = ARM_AM::getAM5Op(MO2.getImm()); + if (ImmOffs || Op == ARM_AM::sub) { O << ", #" << ARM_AM::getAddrOpcStr(ARM_AM::getAM5Op(MO2.getImm())) << ImmOffs * 4; diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp index 94aeb59..11fc0dc 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp @@ -432,8 +432,10 @@ EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, bool isAdd = true; // Special value for #-0 - if (SImm == INT32_MIN) + if (SImm == INT32_MIN) { SImm = 0; + isAdd = false; + } // Immediate is always encoded as positive. The 'U' bit controls add vs sub. if (SImm < 0) { -- cgit v1.1