From 2afde7782dfa56b2e46f79598bdb5f1e09471941 Mon Sep 17 00:00:00 2001 From: Manman Ren Date: Wed, 6 Jun 2012 23:53:03 +0000 Subject: Revert r157755. The commit is intended to fix rdar://11540023. It is implemented as part of peephole optimization. We can actually implement this in the SelectionDAG lowering phase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158122 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/PeepholeOptimizer.cpp | 1 - lib/Target/X86/X86InstrInfo.cpp | 38 -------------------------------------- lib/Target/X86/X86InstrInfo.h | 3 --- 3 files changed, 42 deletions(-) (limited to 'lib') diff --git a/lib/CodeGen/PeepholeOptimizer.cpp b/lib/CodeGen/PeepholeOptimizer.cpp index d7d112f..81cf901 100644 --- a/lib/CodeGen/PeepholeOptimizer.cpp +++ b/lib/CodeGen/PeepholeOptimizer.cpp @@ -472,7 +472,6 @@ bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) { if (SeenMoveImm) Changed |= foldImmediate(MI, MBB, ImmDefRegs, ImmDefMIs); } - Changed |= TII->OptimizeSubInstr(MI, MRI); First = false; PMII = MII; diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 197b9c6..7d5b250 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -2793,44 +2793,6 @@ void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg, NewMIs.push_back(MIB); } -bool X86InstrInfo:: -OptimizeSubInstr(MachineInstr *SubInstr, const MachineRegisterInfo *MRI) const { - // If destination is a memory operand, do not perform this optimization. - if ((SubInstr->getOpcode() != X86::SUB64rr) && - (SubInstr->getOpcode() != X86::SUB32rr) && - (SubInstr->getOpcode() != X86::SUB16rr) && - (SubInstr->getOpcode() != X86::SUB8rr) && - (SubInstr->getOpcode() != X86::SUB64ri32) && - (SubInstr->getOpcode() != X86::SUB64ri8) && - (SubInstr->getOpcode() != X86::SUB32ri) && - (SubInstr->getOpcode() != X86::SUB32ri8) && - (SubInstr->getOpcode() != X86::SUB16ri) && - (SubInstr->getOpcode() != X86::SUB16ri8) && - (SubInstr->getOpcode() != X86::SUB8ri)) - return false; - unsigned DestReg = SubInstr->getOperand(0).getReg(); - if (MRI->use_begin(DestReg) != MRI->use_end()) - return false; - - // There is no use of the destination register, we can replace SUB with CMP. - switch (SubInstr->getOpcode()) { - default: break; - case X86::SUB64rr: SubInstr->setDesc(get(X86::CMP64rr)); break; - case X86::SUB32rr: SubInstr->setDesc(get(X86::CMP32rr)); break; - case X86::SUB16rr: SubInstr->setDesc(get(X86::CMP16rr)); break; - case X86::SUB8rr: SubInstr->setDesc(get(X86::CMP8rr)); break; - case X86::SUB64ri32: SubInstr->setDesc(get(X86::CMP64ri32)); break; - case X86::SUB64ri8: SubInstr->setDesc(get(X86::CMP64ri8)); break; - case X86::SUB32ri: SubInstr->setDesc(get(X86::CMP32ri)); break; - case X86::SUB32ri8: SubInstr->setDesc(get(X86::CMP32ri8)); break; - case X86::SUB16ri: SubInstr->setDesc(get(X86::CMP16ri)); break; - case X86::SUB16ri8: SubInstr->setDesc(get(X86::CMP16ri8)); break; - case X86::SUB8ri: SubInstr->setDesc(get(X86::CMP8ri)); break; - } - SubInstr->RemoveOperand(0); - return true; -} - /// Expand2AddrUndef - Expand a single-def pseudo instruction to a two-addr /// instruction with two undef reads of the register being defined. This is /// used for mapping: diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 088c49f..5ae6b99 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -364,9 +364,6 @@ public: const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const; - virtual bool OptimizeSubInstr(MachineInstr *SubInstr, - const MachineRegisterInfo *MRI) const; - private: MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc, MachineFunction::iterator &MFI, -- cgit v1.1