From 478a8a02bc0f2e739ed8f4240152e99837e480b9 Mon Sep 17 00:00:00 2001
From: Jakob Stoklund Olesen <stoklund@2pi.dk>
Date: Thu, 2 Feb 2012 23:52:57 +0000
Subject: Require non-NULL register masks.

It doesn't seem worthwhile to give meaning to a NULL register mask
pointer. It complicates all the code using register mask operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149646 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/DeadMachineInstructionElim.cpp | 5 +----
 lib/CodeGen/MachineInstr.cpp               | 2 +-
 lib/CodeGen/MachineLICM.cpp                | 5 +----
 lib/Target/X86/X86ISelLowering.cpp         | 4 ++--
 4 files changed, 5 insertions(+), 11 deletions(-)

(limited to 'lib')

diff --git a/lib/CodeGen/DeadMachineInstructionElim.cpp b/lib/CodeGen/DeadMachineInstructionElim.cpp
index aeb0b3e..020b64d8 100644
--- a/lib/CodeGen/DeadMachineInstructionElim.cpp
+++ b/lib/CodeGen/DeadMachineInstructionElim.cpp
@@ -175,10 +175,7 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
           }
         } else if (MO.isRegMask()) {
           // Register mask of preserved registers. All clobbers are dead.
-          if (const uint32_t *Mask = MO.getRegMask())
-            LivePhysRegs.clearBitsNotInMask(Mask);
-          else
-            LivePhysRegs.reset();
+          LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
           LivePhysRegs |= ReservedRegs;
         }
       }
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index c281cd1..7cf282c 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -327,7 +327,7 @@ void MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const {
     OS << '>';
     break;
   case MachineOperand::MO_RegisterMask:
-    OS << (getRegMask() ? "<regmask>" : "<regmask:null>");
+    OS << "<regmask>";
     break;
   case MachineOperand::MO_Metadata:
     OS << '<';
diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index 49a109e..9b058c3 100644
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -417,10 +417,7 @@ void MachineLICM::ProcessMI(MachineInstr *MI,
     // We can't hoist an instruction defining a physreg that is clobbered in
     // the loop.
     if (MO.isRegMask()) {
-      if (const uint32_t *Mask = MO.getRegMask())
-        PhysRegClobbers.setBitsNotInMask(Mask);
-      else
-        PhysRegClobbers.set();
+      PhysRegClobbers.setBitsNotInMask(MO.getRegMask());
       continue;
     }
 
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 5d99a1c..05c0ebd 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -2515,8 +2515,8 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
   // registers.
   if (UseRegMask) {
     const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
-    const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
-    Ops.push_back(DAG.getRegisterMask(Mask));
+    if (const uint32_t *Mask = TRI->getCallPreservedMask(CallConv))
+      Ops.push_back(DAG.getRegisterMask(Mask));
   }
 
   if (InFlag.getNode())
-- 
cgit v1.1