From 8b36f9e4314ac4d786d2d4fd5fa9e7858487ee9e Mon Sep 17 00:00:00 2001 From: Mihai Popa Date: Fri, 16 Aug 2013 11:55:44 +0000 Subject: Fix Thumb2 aliasing complementary instructions taking modified immediates There are many Thumb instructions which take 12-bit immediates encoded in a special 8-byte value + 4-byte rotator form. Not all numbers are represented, and it's legal to transform an assembly instruction to be able to encode the immediate. For example: AND and BIC are complementary instructions; one can switch the AND to a BIC as long as the immediate is complemented. The intent is to switch one instruction into its complementary one when the immediate cannot be encoded in the form requested in the original assembly and when the complementary immediate is encodable. The patch addresses two issues: 1. definition of t2SOImmNot immediate - it has to check that the orignal value is not encoded naturally 2. t2AND and t2BIC instruction aliases which should use the Thumb2 SOImm operand rather than the ARM one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188548 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb2.td | 8 ++++---- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'lib') diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 77a3759..376246b 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -4353,16 +4353,16 @@ def : t2InstAlias<"mvn${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>; // Same for AND <--> BIC def : t2InstAlias<"bic${s}${p} $Rd, $Rn, $imm", - (t2ANDri rGPR:$Rd, rGPR:$Rn, so_imm_not:$imm, + (t2ANDri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; def : t2InstAlias<"bic${s}${p} $Rdn, $imm", - (t2ANDri rGPR:$Rdn, rGPR:$Rdn, so_imm_not:$imm, + (t2ANDri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; def : t2InstAlias<"and${s}${p} $Rd, $Rn, $imm", - (t2BICri rGPR:$Rd, rGPR:$Rn, so_imm_not:$imm, + (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; def : t2InstAlias<"and${s}${p} $Rdn, $imm", - (t2BICri rGPR:$Rdn, rGPR:$Rdn, so_imm_not:$imm, + (t2BICri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; // Likewise, "add Rd, t2_so_imm_neg" -> sub def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm", diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 3d7baf5..d48ece1 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -946,7 +946,8 @@ public: const MCConstantExpr *CE = dyn_cast(getImm()); if (!CE) return false; int64_t Value = CE->getValue(); - return ARM_AM::getT2SOImmVal(~Value) != -1; + return ARM_AM::getT2SOImmVal(Value) == -1 && + ARM_AM::getT2SOImmVal(~Value) != -1; } bool isT2SOImmNeg() const { if (!isImm()) return false; -- cgit v1.1