From d8ead9e25021d5c07b222f8550b621b4f31c874f Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Wed, 28 Sep 2005 22:53:16 +0000
Subject: Autogen MUL, move FP cases together
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23512 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 36 ++++++++++++----------------------
1 file changed, 12 insertions(+), 24 deletions(-)
(limited to 'lib')
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index bea50f7..ba02c4e 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -820,23 +820,6 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
Select(N->getOperand(1)));
return SDOperand(N, 0);
}
- case ISD::MUL: {
- unsigned Imm, Opc;
- if (isIntImmediate(N->getOperand(1), Imm) && isInt16(Imm)) {
- CurDAG->SelectNodeTo(N, PPC::MULLI, MVT::i32,
- Select(N->getOperand(0)), getI32Imm(Lo16(Imm)));
- return SDOperand(N, 0);
- }
- CurDAG->SelectNodeTo(N, PPC::MULLW, MVT::i32, Select(N->getOperand(0)),
- Select(N->getOperand(1)));
- return SDOperand(N, 0);
- }
- case ISD::FMUL: {
- unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FMULS : PPC::FMUL;
- CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Select(N->getOperand(0)),
- Select(N->getOperand(1)));
- return SDOperand(N, 0);
- }
case ISD::SDIV: {
unsigned Imm;
if (isIntImmediate(N->getOperand(1), Imm)) {
@@ -871,13 +854,6 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
Select(N->getOperand(1)));
return SDOperand(N, 0);
}
- case ISD::FDIV: {
- unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FDIVS : PPC::FDIV;
- CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Select(N->getOperand(0)),
- Select(N->getOperand(1)));
- return SDOperand(N, 0);
- }
-
case ISD::UDIV: {
// If this is a divide by constant, we can emit code using some magic
// constants to implement it as a multiply instead.
@@ -997,6 +973,18 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
Select(N->getOperand(1)));
return SDOperand(N, 0);
}
+ case ISD::FMUL: {
+ unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FMULS : PPC::FMUL;
+ CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Select(N->getOperand(0)),
+ Select(N->getOperand(1)));
+ return SDOperand(N, 0);
+ }
+ case ISD::FDIV: {
+ unsigned Opc = N->getValueType(0) == MVT::f32 ? PPC::FDIVS : PPC::FDIV;
+ CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), Select(N->getOperand(0)),
+ Select(N->getOperand(1)));
+ return SDOperand(N, 0);
+ }
case ISD::FABS:
CurDAG->SelectNodeTo(N, PPC::FABS, N->getValueType(0),
Select(N->getOperand(0)));
--
cgit v1.1