From dce4a407a24b04eebc6a376f8e62b41aaa7b071f Mon Sep 17 00:00:00 2001 From: Stephen Hines Date: Thu, 29 May 2014 02:49:00 -0700 Subject: Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f --- test/CodeGen/AArch64/arm64-unaligned_ldst.ll | 41 ++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 test/CodeGen/AArch64/arm64-unaligned_ldst.ll (limited to 'test/CodeGen/AArch64/arm64-unaligned_ldst.ll') diff --git a/test/CodeGen/AArch64/arm64-unaligned_ldst.ll b/test/CodeGen/AArch64/arm64-unaligned_ldst.ll new file mode 100644 index 0000000..20b80c0 --- /dev/null +++ b/test/CodeGen/AArch64/arm64-unaligned_ldst.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -march=arm64 | FileCheck %s +; rdar://r11231896 + +define void @t1(i8* nocapture %a, i8* nocapture %b) nounwind { +entry: +; CHECK-LABEL: t1: +; CHECK-NOT: orr +; CHECK: ldr [[X0:x[0-9]+]], [x1] +; CHECK: str [[X0]], [x0] + %tmp1 = bitcast i8* %b to i64* + %tmp2 = bitcast i8* %a to i64* + %tmp3 = load i64* %tmp1, align 1 + store i64 %tmp3, i64* %tmp2, align 1 + ret void +} + +define void @t2(i8* nocapture %a, i8* nocapture %b) nounwind { +entry: +; CHECK-LABEL: t2: +; CHECK-NOT: orr +; CHECK: ldr [[W0:w[0-9]+]], [x1] +; CHECK: str [[W0]], [x0] + %tmp1 = bitcast i8* %b to i32* + %tmp2 = bitcast i8* %a to i32* + %tmp3 = load i32* %tmp1, align 1 + store i32 %tmp3, i32* %tmp2, align 1 + ret void +} + +define void @t3(i8* nocapture %a, i8* nocapture %b) nounwind { +entry: +; CHECK-LABEL: t3: +; CHECK-NOT: orr +; CHECK: ldrh [[W0:w[0-9]+]], [x1] +; CHECK: strh [[W0]], [x0] + %tmp1 = bitcast i8* %b to i16* + %tmp2 = bitcast i8* %a to i16* + %tmp3 = load i16* %tmp1, align 1 + store i16 %tmp3, i16* %tmp2, align 1 + ret void +} -- cgit v1.1