From d9df5017040489303acb57bdd8697ef0f8bafc08 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Thu, 9 Apr 2009 17:16:43 +0000 Subject: Fix pr3954. The register scavenger asserts for inline assembly with register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll (limited to 'test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll') diff --git a/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll b/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll new file mode 100644 index 0000000..223fa0f --- /dev/null +++ b/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=arm +; PR3954 + +define void @foo(...) nounwind { +entry: + %rr = alloca i32 ; [#uses=2] + %0 = load i32* %rr ; [#uses=1] + %1 = call i32 asm "nop", "=r,0"(i32 %0) nounwind ; [#uses=1] + store i32 %1, i32* %rr + br label %return + +return: ; preds = %entry + ret void +} -- cgit v1.1