From 205a5ca6cfabc6cd408634a2fa7f2529956cc2cf Mon Sep 17 00:00:00 2001
From: Bob Wilson <bob.wilson@apple.com>
Date: Wed, 8 Jul 2009 18:11:30 +0000
Subject: Implement NEON vld1 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/ARM/vld1.ll | 67 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 test/CodeGen/ARM/vld1.ll

(limited to 'test/CodeGen/ARM')

diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll
new file mode 100644
index 0000000..161cb71
--- /dev/null
+++ b/test/CodeGen/ARM/vld1.ll
@@ -0,0 +1,67 @@
+; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
+; RUN: grep {vld1\\.8} %t | count 2
+; RUN: grep {vld1\\.16} %t | count 2
+; RUN: grep {vld1\\.32} %t | count 4
+; RUN: grep {vld1\\.64} %t | count 2
+
+define <8 x i8> @vld1i8(i8* %A) nounwind {
+	%tmp1 = call <8 x i8> @llvm.arm.neon.vldi.v8i8(i8* %A, i32 1)
+	ret <8 x i8> %tmp1
+}
+
+define <4 x i16> @vld1i16(i16* %A) nounwind {
+	%tmp1 = call <4 x i16> @llvm.arm.neon.vldi.v4i16(i16* %A, i32 1)
+	ret <4 x i16> %tmp1
+}
+
+define <2 x i32> @vld1i32(i32* %A) nounwind {
+	%tmp1 = call <2 x i32> @llvm.arm.neon.vldi.v2i32(i32* %A, i32 1)
+	ret <2 x i32> %tmp1
+}
+
+define <2 x float> @vld1f(float* %A) nounwind {
+	%tmp1 = call <2 x float> @llvm.arm.neon.vldf.v2f32(float* %A, i32 1)
+	ret <2 x float> %tmp1
+}
+
+define <1 x i64> @vld1i64(i64* %A) nounwind {
+	%tmp1 = call <1 x i64> @llvm.arm.neon.vldi.v1i64(i64* %A, i32 1)
+	ret <1 x i64> %tmp1
+}
+
+define <16 x i8> @vld1Qi8(i8* %A) nounwind {
+	%tmp1 = call <16 x i8> @llvm.arm.neon.vldi.v16i8(i8* %A, i32 1)
+	ret <16 x i8> %tmp1
+}
+
+define <8 x i16> @vld1Qi16(i16* %A) nounwind {
+	%tmp1 = call <8 x i16> @llvm.arm.neon.vldi.v8i16(i16* %A, i32 1)
+	ret <8 x i16> %tmp1
+}
+
+define <4 x i32> @vld1Qi32(i32* %A) nounwind {
+	%tmp1 = call <4 x i32> @llvm.arm.neon.vldi.v4i32(i32* %A, i32 1)
+	ret <4 x i32> %tmp1
+}
+
+define <4 x float> @vld1Qf(float* %A) nounwind {
+	%tmp1 = call <4 x float> @llvm.arm.neon.vldf.v4f32(float* %A, i32 1)
+	ret <4 x float> %tmp1
+}
+
+define <2 x i64> @vld1Qi64(i64* %A) nounwind {
+	%tmp1 = call <2 x i64> @llvm.arm.neon.vldi.v2i64(i64* %A, i32 1)
+	ret <2 x i64> %tmp1
+}
+
+declare <8 x i8>  @llvm.arm.neon.vldi.v8i8(i8*, i32) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vldi.v4i16(i16*, i32) nounwind readnone
+declare <2 x i32> @llvm.arm.neon.vldi.v2i32(i32*, i32) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vldf.v2f32(float*, i32) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vldi.v1i64(i64*, i32) nounwind readnone
+
+declare <16 x i8> @llvm.arm.neon.vldi.v16i8(i8*, i32) nounwind readnone
+declare <8 x i16> @llvm.arm.neon.vldi.v8i16(i16*, i32) nounwind readnone
+declare <4 x i32> @llvm.arm.neon.vldi.v4i32(i32*, i32) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vldf.v4f32(float*, i32) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vldi.v2i64(i64*, i32) nounwind readnone
-- 
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