From d0626aaccaeeaabbd32687e1d3f963e4d7555b0a Mon Sep 17 00:00:00 2001 From: Lang Hames Date: Thu, 7 Jul 2011 00:36:02 +0000 Subject: Added a testcase for PR10220. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134573 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll (limited to 'test/CodeGen/Generic') diff --git a/test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll b/test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll new file mode 100644 index 0000000..e4f0c8a --- /dev/null +++ b/test/CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s +; This used to cause ScheduleDAG to crash during EmitPhysRegCopy when it mistook +; followed a non-control dependence, PR10220. + +define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) nounwind uwtable noinline ssp { +entry: + %c = load i256* %cc + %d = load i256* %dd + %add = add nsw i256 %c, %d + store i256 %add, i256* %a, align 8 + %or = or i256 %c, 1606938044258990275541962092341162602522202993782792835301376 + %add6 = add nsw i256 %or, %d + store i256 %add6, i256* %b, align 8 + ret void +} -- cgit v1.1