From 0dac3919e52e28308deba555bbcb6286674d5495 Mon Sep 17 00:00:00 2001
From: Sirish Pande <spande@codeaurora.org>
Date: Mon, 23 Apr 2012 17:49:20 +0000
Subject: Support for Hexagon VLIW Packetizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155365 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/Hexagon/fusedandshift.ll | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 test/CodeGen/Hexagon/fusedandshift.ll

(limited to 'test/CodeGen/Hexagon/fusedandshift.ll')

diff --git a/test/CodeGen/Hexagon/fusedandshift.ll b/test/CodeGen/Hexagon/fusedandshift.ll
new file mode 100644
index 0000000..022b3c6
--- /dev/null
+++ b/test/CodeGen/Hexagon/fusedandshift.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4  < %s | FileCheck %s
+; Check that we generate fused logical and with shift instruction.
+
+; CHECK: r{{[0-9]+}} = and(#15, lsr(r{{[0-9]+}}, #{{[0-9]+}})
+
+define i32 @main(i16* %a, i16* %b) nounwind {
+  entry:
+  %0 = load i16* %a, align 2
+  %conv1 = sext i16 %0 to i32
+  %shr1 = ashr i32 %conv1, 3
+  %and1 = and i32 %shr1, 15
+  %conv2 = trunc i32 %and1 to i16
+  store i16 %conv2, i16* %b, align 2
+  ret i32 0
+}
+
-- 
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