From f17a25c88b892d30c2b41ba7ecdfbdfb2b4be9cc Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 18 Jul 2007 16:29:46 +0000 Subject: It's not necessary to do rounding for alloca operations when the requested alignment is equal to the stack alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40004 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll | 6 + test/CodeGen/PowerPC/2004-11-30-shift-crash.ll | 6 + test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll | 7 + test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll | 3 + test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll | 8 + test/CodeGen/PowerPC/2005-01-14-UndefLong.ll | 3 + test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll | 12 + .../PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll | 10 + .../CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll | 9 + test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll | 17 + .../PowerPC/2006-01-11-darwin-fp-argument.ll | 12 + test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll | 17 + .../PowerPC/2006-04-01-FloatDoubleExtend.ll | 7 + test/CodeGen/PowerPC/2006-04-05-splat-ish.ll | 10 + test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll | 72 + test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll | 60 + .../PowerPC/2006-07-07-ComputeMaskedBits.ll | 16 + test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll | 10 + test/CodeGen/PowerPC/2006-08-11-RetVector.ll | 8 + test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll | 38 + test/CodeGen/PowerPC/2006-09-28-shift_64.ll | 27 + .../PowerPC/2006-10-11-combiner-aa-regression.ll | 26 + test/CodeGen/PowerPC/2006-10-13-Miscompile.ll | 18 + test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll | 24 + test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll | 6 + .../PowerPC/2006-11-10-DAGCombineMiscompile.ll | 14 + test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll | 10 + test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll | 26 + test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll | 27 + test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll | 10 + test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll | 27 + test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll | 7 + .../PowerPC/2007-01-31-InlineAsmAddrMode.ll | 24 + test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll | 4 + .../PowerPC/2007-02-16-InlineAsmNConstraint.ll | 11 + test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll | 14 + test/CodeGen/PowerPC/2007-03-24-cntlzd.ll | 11 + test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll | 1801 ++++++++++++++++++++ .../PowerPC/2007-04-24-InlineAsm-I-Modifier.ll | 15 + .../PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 27 + .../PowerPC/2007-05-03-InlineAsm-S-Constraint.ll | 12 + .../PowerPC/2007-05-14-InlineAsmSelectCrash.ll | 25 + test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll | 68 + .../PowerPC/2007-05-30-dagcombine-miscomp.ll | 14 + test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll | 85 + test/CodeGen/PowerPC/Frames-align.ll | 16 + test/CodeGen/PowerPC/Frames-alloca.ll | 55 + test/CodeGen/PowerPC/Frames-large.ll | 79 + test/CodeGen/PowerPC/Frames-leaf.ll | 40 + test/CodeGen/PowerPC/Frames-small.ll | 34 + test/CodeGen/PowerPC/LargeAbsoluteAddr.ll | 17 + test/CodeGen/PowerPC/addc.ll | 27 + test/CodeGen/PowerPC/addi-reassoc.ll | 20 + test/CodeGen/PowerPC/align.ll | 12 + test/CodeGen/PowerPC/and-branch.ll | 18 + test/CodeGen/PowerPC/and-elim.ll | 18 + test/CodeGen/PowerPC/and-imm.ll | 12 + test/CodeGen/PowerPC/and_add.ll | 12 + test/CodeGen/PowerPC/and_sext.ll | 28 + test/CodeGen/PowerPC/and_sra.ll | 26 + test/CodeGen/PowerPC/big-endian-actual-args.ll | 9 + test/CodeGen/PowerPC/big-endian-call-result.ll | 13 + test/CodeGen/PowerPC/big-endian-formal-args.ll | 15 + test/CodeGen/PowerPC/branch-opt.ll | 93 + test/CodeGen/PowerPC/bswap-load-store.ll | 44 + test/CodeGen/PowerPC/buildvec_canonicalize.ll | 27 + test/CodeGen/PowerPC/calls.ll | 31 + test/CodeGen/PowerPC/cmp-cmp.ll | 15 + test/CodeGen/PowerPC/compare-duplicate.ll | 11 + test/CodeGen/PowerPC/compare-simm.ll | 14 + test/CodeGen/PowerPC/constants.ll | 54 + test/CodeGen/PowerPC/cttz.ll | 12 + test/CodeGen/PowerPC/darwin-labels.ll | 8 + test/CodeGen/PowerPC/dg.exp | 5 + test/CodeGen/PowerPC/div-2.ll | 29 + test/CodeGen/PowerPC/eqv-andc-orc-nor.ll | 94 + test/CodeGen/PowerPC/extsh.ll | 7 + test/CodeGen/PowerPC/fma.ll | 47 + test/CodeGen/PowerPC/fnabs.ll | 11 + test/CodeGen/PowerPC/fneg.ll | 12 + test/CodeGen/PowerPC/fnegsel.ll | 8 + test/CodeGen/PowerPC/fold-li.ll | 14 + test/CodeGen/PowerPC/fp-branch.ll | 20 + test/CodeGen/PowerPC/fp-int-fp.ll | 26 + test/CodeGen/PowerPC/fp_to_uint.ll | 9 + test/CodeGen/PowerPC/fpcopy.ll | 6 + test/CodeGen/PowerPC/fsqrt.ll | 21 + test/CodeGen/PowerPC/hello.ll | 12 + test/CodeGen/PowerPC/i64_fp.ll | 25 + test/CodeGen/PowerPC/iabs.ll | 15 + test/CodeGen/PowerPC/inlineasm-copy.ll | 13 + test/CodeGen/PowerPC/inverted-bool-compares.ll | 10 + test/CodeGen/PowerPC/ispositive.ll | 10 + test/CodeGen/PowerPC/lha.ll | 7 + test/CodeGen/PowerPC/load-constant-addr.ll | 9 + test/CodeGen/PowerPC/long-compare.ll | 9 + test/CodeGen/PowerPC/mem-rr-addr-mode.ll | 17 + test/CodeGen/PowerPC/mem_update.ll | 68 + test/CodeGen/PowerPC/mul-neg-power-2.ll | 8 + test/CodeGen/PowerPC/mulhs.ll | 18 + test/CodeGen/PowerPC/neg.ll | 6 + test/CodeGen/PowerPC/or-addressing-mode.ll | 22 + test/CodeGen/PowerPC/reg-coalesce-simple.ll | 11 + test/CodeGen/PowerPC/rlwimi-commute.ll | 26 + test/CodeGen/PowerPC/rlwimi.ll | 72 + test/CodeGen/PowerPC/rlwimi2.ll | 31 + test/CodeGen/PowerPC/rlwimi3.ll | 26 + test/CodeGen/PowerPC/rlwinm.ll | 64 + test/CodeGen/PowerPC/rlwinm2.ll | 28 + test/CodeGen/PowerPC/rotl-2.ll | 38 + test/CodeGen/PowerPC/rotl.ll | 37 + test/CodeGen/PowerPC/select_lt0.ll | 51 + test/CodeGen/PowerPC/setcc_no_zext.ll | 8 + test/CodeGen/PowerPC/seteq-0.ll | 9 + test/CodeGen/PowerPC/shl_elim.ll | 11 + test/CodeGen/PowerPC/shl_sext.ll | 17 + test/CodeGen/PowerPC/sign_ext_inreg1.ll | 12 + test/CodeGen/PowerPC/small-arguments.ll | 52 + test/CodeGen/PowerPC/stfiwx.ll | 26 + test/CodeGen/PowerPC/store-load-fwd.ll | 6 + test/CodeGen/PowerPC/subc.ll | 26 + test/CodeGen/PowerPC/unsafe-math.ll | 10 + test/CodeGen/PowerPC/vcmp-fold.ll | 21 + test/CodeGen/PowerPC/vec_br_cmp.ll | 23 + test/CodeGen/PowerPC/vec_call.ll | 11 + test/CodeGen/PowerPC/vec_constants.ll | 47 + test/CodeGen/PowerPC/vec_mul.ll | 24 + test/CodeGen/PowerPC/vec_perf_shuffle.ll | 42 + test/CodeGen/PowerPC/vec_shuffle.ll | 506 ++++++ test/CodeGen/PowerPC/vec_spat.ll | 73 + test/CodeGen/PowerPC/vec_vrsave.ll | 14 + test/CodeGen/PowerPC/vec_zero.ll | 8 + test/CodeGen/PowerPC/vector-identity-shuffle.ll | 16 + test/CodeGen/PowerPC/vector.ll | 157 ++ 134 files changed, 5485 insertions(+) create mode 100644 test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll create mode 100644 test/CodeGen/PowerPC/2004-11-30-shift-crash.ll create mode 100644 test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll create mode 100644 test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll create mode 100644 test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll create mode 100644 test/CodeGen/PowerPC/2005-01-14-UndefLong.ll create mode 100644 test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll create mode 100644 test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll create mode 100644 test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll create mode 100644 test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll create mode 100644 test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll create mode 100644 test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll create mode 100644 test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll create mode 100644 test/CodeGen/PowerPC/2006-04-05-splat-ish.ll create mode 100644 test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll create mode 100644 test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll create mode 100644 test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll create mode 100644 test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll create mode 100644 test/CodeGen/PowerPC/2006-08-11-RetVector.ll create mode 100644 test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll create mode 100644 test/CodeGen/PowerPC/2006-09-28-shift_64.ll create mode 100644 test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll create mode 100644 test/CodeGen/PowerPC/2006-10-13-Miscompile.ll create mode 100644 test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll create mode 100644 test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll create mode 100644 test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll create mode 100644 test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll create mode 100644 test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll create mode 100644 test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll create mode 100644 test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll create mode 100644 test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll create mode 100644 test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll create mode 100644 test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll create mode 100644 test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll create mode 100644 test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll create mode 100644 test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll create mode 100644 test/CodeGen/PowerPC/2007-03-24-cntlzd.ll create mode 100644 test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll create mode 100644 test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll create mode 100644 test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll create mode 100644 test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll create mode 100644 test/CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll create mode 100644 test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll create mode 100644 test/CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll create mode 100644 test/CodeGen/PowerPC/2007-06-28-BCCISelBug.ll create mode 100644 test/CodeGen/PowerPC/Frames-align.ll create mode 100644 test/CodeGen/PowerPC/Frames-alloca.ll create mode 100644 test/CodeGen/PowerPC/Frames-large.ll create mode 100644 test/CodeGen/PowerPC/Frames-leaf.ll create mode 100644 test/CodeGen/PowerPC/Frames-small.ll create mode 100644 test/CodeGen/PowerPC/LargeAbsoluteAddr.ll create mode 100644 test/CodeGen/PowerPC/addc.ll create mode 100644 test/CodeGen/PowerPC/addi-reassoc.ll create mode 100644 test/CodeGen/PowerPC/align.ll create mode 100644 test/CodeGen/PowerPC/and-branch.ll create mode 100644 test/CodeGen/PowerPC/and-elim.ll create mode 100644 test/CodeGen/PowerPC/and-imm.ll create mode 100644 test/CodeGen/PowerPC/and_add.ll create mode 100644 test/CodeGen/PowerPC/and_sext.ll create mode 100644 test/CodeGen/PowerPC/and_sra.ll create mode 100644 test/CodeGen/PowerPC/big-endian-actual-args.ll create mode 100644 test/CodeGen/PowerPC/big-endian-call-result.ll create mode 100644 test/CodeGen/PowerPC/big-endian-formal-args.ll create mode 100644 test/CodeGen/PowerPC/branch-opt.ll create mode 100644 test/CodeGen/PowerPC/bswap-load-store.ll create mode 100644 test/CodeGen/PowerPC/buildvec_canonicalize.ll create mode 100644 test/CodeGen/PowerPC/calls.ll create mode 100644 test/CodeGen/PowerPC/cmp-cmp.ll create mode 100644 test/CodeGen/PowerPC/compare-duplicate.ll create mode 100644 test/CodeGen/PowerPC/compare-simm.ll create mode 100644 test/CodeGen/PowerPC/constants.ll create mode 100644 test/CodeGen/PowerPC/cttz.ll create mode 100644 test/CodeGen/PowerPC/darwin-labels.ll create mode 100644 test/CodeGen/PowerPC/dg.exp create mode 100644 test/CodeGen/PowerPC/div-2.ll create mode 100644 test/CodeGen/PowerPC/eqv-andc-orc-nor.ll create mode 100644 test/CodeGen/PowerPC/extsh.ll create mode 100644 test/CodeGen/PowerPC/fma.ll create mode 100644 test/CodeGen/PowerPC/fnabs.ll create mode 100644 test/CodeGen/PowerPC/fneg.ll create mode 100644 test/CodeGen/PowerPC/fnegsel.ll create mode 100644 test/CodeGen/PowerPC/fold-li.ll create mode 100644 test/CodeGen/PowerPC/fp-branch.ll create mode 100644 test/CodeGen/PowerPC/fp-int-fp.ll create mode 100644 test/CodeGen/PowerPC/fp_to_uint.ll create mode 100644 test/CodeGen/PowerPC/fpcopy.ll create mode 100644 test/CodeGen/PowerPC/fsqrt.ll create mode 100644 test/CodeGen/PowerPC/hello.ll create mode 100644 test/CodeGen/PowerPC/i64_fp.ll create mode 100644 test/CodeGen/PowerPC/iabs.ll create mode 100644 test/CodeGen/PowerPC/inlineasm-copy.ll create mode 100644 test/CodeGen/PowerPC/inverted-bool-compares.ll create mode 100644 test/CodeGen/PowerPC/ispositive.ll create mode 100644 test/CodeGen/PowerPC/lha.ll create mode 100644 test/CodeGen/PowerPC/load-constant-addr.ll create mode 100644 test/CodeGen/PowerPC/long-compare.ll create mode 100644 test/CodeGen/PowerPC/mem-rr-addr-mode.ll create mode 100644 test/CodeGen/PowerPC/mem_update.ll create mode 100644 test/CodeGen/PowerPC/mul-neg-power-2.ll create mode 100644 test/CodeGen/PowerPC/mulhs.ll create mode 100644 test/CodeGen/PowerPC/neg.ll create mode 100644 test/CodeGen/PowerPC/or-addressing-mode.ll create mode 100644 test/CodeGen/PowerPC/reg-coalesce-simple.ll create mode 100644 test/CodeGen/PowerPC/rlwimi-commute.ll create mode 100644 test/CodeGen/PowerPC/rlwimi.ll create mode 100644 test/CodeGen/PowerPC/rlwimi2.ll create mode 100644 test/CodeGen/PowerPC/rlwimi3.ll create mode 100644 test/CodeGen/PowerPC/rlwinm.ll create mode 100644 test/CodeGen/PowerPC/rlwinm2.ll create mode 100644 test/CodeGen/PowerPC/rotl-2.ll create mode 100644 test/CodeGen/PowerPC/rotl.ll create mode 100644 test/CodeGen/PowerPC/select_lt0.ll create mode 100644 test/CodeGen/PowerPC/setcc_no_zext.ll create mode 100644 test/CodeGen/PowerPC/seteq-0.ll create mode 100644 test/CodeGen/PowerPC/shl_elim.ll create mode 100644 test/CodeGen/PowerPC/shl_sext.ll create mode 100644 test/CodeGen/PowerPC/sign_ext_inreg1.ll create mode 100644 test/CodeGen/PowerPC/small-arguments.ll create mode 100644 test/CodeGen/PowerPC/stfiwx.ll create mode 100644 test/CodeGen/PowerPC/store-load-fwd.ll create mode 100644 test/CodeGen/PowerPC/subc.ll create mode 100644 test/CodeGen/PowerPC/unsafe-math.ll create mode 100644 test/CodeGen/PowerPC/vcmp-fold.ll create mode 100644 test/CodeGen/PowerPC/vec_br_cmp.ll create mode 100644 test/CodeGen/PowerPC/vec_call.ll create mode 100644 test/CodeGen/PowerPC/vec_constants.ll create mode 100644 test/CodeGen/PowerPC/vec_mul.ll create mode 100644 test/CodeGen/PowerPC/vec_perf_shuffle.ll create mode 100644 test/CodeGen/PowerPC/vec_shuffle.ll create mode 100644 test/CodeGen/PowerPC/vec_spat.ll create mode 100644 test/CodeGen/PowerPC/vec_vrsave.ll create mode 100644 test/CodeGen/PowerPC/vec_zero.ll create mode 100644 test/CodeGen/PowerPC/vector-identity-shuffle.ll create mode 100644 test/CodeGen/PowerPC/vector.ll (limited to 'test/CodeGen/PowerPC') diff --git a/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll new file mode 100644 index 0000000..e2a00d1 --- /dev/null +++ b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %main() { + %tr1 = shr uint 1, ubyte 0 + ret void +} diff --git a/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll new file mode 100644 index 0000000..4603bdb --- /dev/null +++ b/test/CodeGen/PowerPC/2004-11-30-shift-crash.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %main() { + %tr4 = shl ulong 1, ubyte 0 ; [#uses=0] + ret void +} diff --git a/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll new file mode 100644 index 0000000..8f54c78 --- /dev/null +++ b/test/CodeGen/PowerPC/2004-11-30-shr-var-crash.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %main() { + %shamt = add ubyte 0, 1 ; [#uses=1] + %tr2 = shr long 1, ubyte %shamt ; [#uses=0] + ret void +} diff --git a/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll new file mode 100644 index 0000000..87f6005 --- /dev/null +++ b/test/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll @@ -0,0 +1,3 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep .comm.*X,0 + +%X = linkonce global {} {} diff --git a/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll new file mode 100644 index 0000000..5dc4b28 --- /dev/null +++ b/test/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +int %main() { + %setle = setle long 1, 0 + %select = select bool true, bool %setle, bool true + ret int 0 +} + diff --git a/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll new file mode 100644 index 0000000..a4121c5 --- /dev/null +++ b/test/CodeGen/PowerPC/2005-01-14-UndefLong.ll @@ -0,0 +1,3 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +long %test() { ret long undef } diff --git a/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll new file mode 100644 index 0000000..ef0137f --- /dev/null +++ b/test/CodeGen/PowerPC/2005-08-12-rlwimi-crash.ll @@ -0,0 +1,12 @@ +; this should not crash the ppc backend + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +uint %test( int %j.0.0.i) { + %tmp.85.i = and int %j.0.0.i, 7 + %tmp.161278.i = cast int %tmp.85.i to uint + %tmp.5.i77.i = shr uint %tmp.161278.i, ubyte 3 + ret uint %tmp.5.i77.i +} + + diff --git a/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll new file mode 100644 index 0000000..7bb1317 --- /dev/null +++ b/test/CodeGen/PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll @@ -0,0 +1,10 @@ +; This function should have exactly one call to fixdfdi, no more! + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mattr=-64bit | \ +; RUN: grep {bl .*fixdfdi} | wc -l | grep 1 + +double %test2(double %tmp.7705) { + %mem_tmp.2.0.in = cast double %tmp.7705 to long ; [#uses=1] + %mem_tmp.2.0 = cast long %mem_tmp.2.0.in to double + ret double %mem_tmp.2.0 +} diff --git a/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll new file mode 100644 index 0000000..edbdc4a --- /dev/null +++ b/test/CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll @@ -0,0 +1,9 @@ +; This was erroneously being turned into an rlwinm instruction. +; The sign bit does matter in this case. + +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep srawi +int %test(int %X) { + %Y = and int %X, -2 + %Z = shr int %Y, ubyte 11 + ret int %Z +} diff --git a/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll new file mode 100644 index 0000000..4264e9e --- /dev/null +++ b/test/CodeGen/PowerPC/2005-11-30-vastart-crash.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" +implementation ; Functions: + +void %bar(int %G, int %E, int %F, int %A, int %B, int %C, int %D, sbyte* %fmt, ...) { + %ap = alloca sbyte* ; [#uses=2] + call void %llvm.va_start( sbyte** %ap ) + %tmp.1 = load sbyte** %ap ; [#uses=1] + %tmp.0 = call double %foo( sbyte* %tmp.1 ) ; [#uses=0] + ret void +} + +declare void %llvm.va_start(sbyte**) + +declare double %foo(sbyte*) diff --git a/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll new file mode 100644 index 0000000..c90ef0a --- /dev/null +++ b/test/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll @@ -0,0 +1,12 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc | not grep {, f1} + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" + +; Dead argument should reserve an FP register. +double %bar(double %DEAD, double %X, double %Y) { + %tmp.2 = add double %X, %Y + ret double %tmp.2 +} + diff --git a/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll new file mode 100644 index 0000000..7700459 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll @@ -0,0 +1,17 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %iterative_hash_host_wide_int() { + %zero = alloca int ; [#uses=2] + %b = alloca uint ; [#uses=1] + store int 0, int* %zero + %tmp = load int* %zero ; [#uses=1] + %tmp5 = cast int %tmp to uint ; [#uses=1] + %tmp6.u = add uint %tmp5, 32 ; [#uses=1] + %tmp6 = cast uint %tmp6.u to int ; [#uses=1] + %tmp7 = load long* null ; [#uses=1] + %tmp6 = cast int %tmp6 to ubyte ; [#uses=1] + %tmp8 = shr long %tmp7, ubyte %tmp6 ; [#uses=1] + %tmp8 = cast long %tmp8 to uint ; [#uses=1] + store uint %tmp8, uint* %b + unreachable +} diff --git a/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll new file mode 100644 index 0000000..dcf599b --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-01-FloatDoubleExtend.ll @@ -0,0 +1,7 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +double %CalcSpeed(float %tmp127) { + %tmp145 = cast float %tmp127 to double ; [#uses=1] + %tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 ) ; [#uses=0] + ret double %tmp150 +} diff --git a/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll new file mode 100644 index 0000000..b4facea --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ +; RUN: grep {vspltish v.*, 10} + +void %test(<8 x short>* %P) { + %tmp = load <8 x short>* %P ; <<8 x short>> [#uses=1] + %tmp1 = add <8 x short> %tmp, < short 10, short 10, short 10, short 10, short 10, short 10, short 10, short 10 > ; <<8 x short>> [#uses=1] + store <8 x short> %tmp1, <8 x short>* %P + ret void +} diff --git a/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll new file mode 100644 index 0000000..59f7ed4 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll @@ -0,0 +1,72 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 + +void %test(sbyte* %stack) { +entry: + %tmp9 = seteq int 0, 0 ; [#uses=1] + %tmp30 = seteq uint 0, 0 ; [#uses=1] + br bool %tmp30, label %cond_next54, label %cond_true31 + +cond_true860: ; preds = %bb855 + %tmp879 = tail call <4 x float> %llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1] + %tmp880 = cast <4 x float> %tmp879 to <4 x int> ; <<4 x int>> [#uses=2] + %tmp883 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 1, uint 1, uint 1, uint 1 > ; <<4 x int>> [#uses=1] + %tmp883 = cast <4 x int> %tmp883 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp885 = shufflevector <4 x int> %tmp880, <4 x int> undef, <4 x uint> < uint 2, uint 2, uint 2, uint 2 > ; <<4 x int>> [#uses=1] + %tmp885 = cast <4 x int> %tmp885 to <4 x float> ; <<4 x float>> [#uses=1] + br label %cond_next905 + +cond_true31: ; preds = %entry + ret void + +cond_next54: ; preds = %entry + br bool %tmp9, label %cond_false385, label %bb279 + +bb279: ; preds = %cond_next54 + ret void + +cond_false385: ; preds = %cond_next54 + %tmp388 = seteq uint 0, 0 ; [#uses=1] + br bool %tmp388, label %cond_next463, label %cond_true389 + +cond_true389: ; preds = %cond_false385 + ret void + +cond_next463: ; preds = %cond_false385 + %tmp1208107 = setgt sbyte* null, %stack ; [#uses=1] + br bool %tmp1208107, label %cond_true1209.preheader, label %bb1212 + +cond_true498: ; preds = %cond_true1209.preheader + ret void + +cond_true519: ; preds = %cond_true1209.preheader + %bothcond = or bool false, false ; [#uses=1] + br bool %bothcond, label %bb855, label %bb980 + +cond_false548: ; preds = %cond_true1209.preheader + ret void + +bb855: ; preds = %cond_true519 + %tmp859 = seteq int 0, 0 ; [#uses=1] + br bool %tmp859, label %cond_true860, label %cond_next905 + +cond_next905: ; preds = %bb855, %cond_true860 + %vfpw2.4 = phi <4 x float> [ %tmp885, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0] + %vfpw1.4 = phi <4 x float> [ %tmp883, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0] + %tmp930 = cast <4 x float> zeroinitializer to <4 x int> ; <<4 x int>> [#uses=0] + ret void + +bb980: ; preds = %cond_true519 + ret void + +cond_true1209.preheader: ; preds = %cond_next463 + %tmp496 = and uint 0, 12288 ; [#uses=1] + switch uint %tmp496, label %cond_false548 [ + uint 0, label %cond_true498 + uint 4096, label %cond_true519 + ] + +bb1212: ; preds = %cond_next463 + ret void +} + +declare <4 x float> %llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>) diff --git a/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll new file mode 100644 index 0000000..6c34cd7 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-05-12-rlwimi-crash.ll @@ -0,0 +1,60 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + + %struct.attr_desc = type { sbyte*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, uint } + %struct.attr_value = type { %struct.rtx_def*, %struct.attr_value*, %struct.insn_ent*, int, int } + %struct.insn_def = type { %struct.insn_def*, %struct.rtx_def*, int, int, int, int, int } + %struct.insn_ent = type { %struct.insn_ent*, %struct.insn_def* } + %struct.rtx_def = type { ushort, ubyte, ubyte, %struct.u } + %struct.u = type { [1 x long] } + +implementation ; Functions: + +void %find_attr() { +entry: + %tmp26 = seteq %struct.attr_desc* null, null ; [#uses=1] + br bool %tmp26, label %bb30, label %cond_true27 + +cond_true27: ; preds = %entry + ret void + +bb30: ; preds = %entry + %tmp67 = seteq %struct.attr_desc* null, null ; [#uses=1] + br bool %tmp67, label %cond_next92, label %cond_true68 + +cond_true68: ; preds = %bb30 + ret void + +cond_next92: ; preds = %bb30 + %tmp173 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=2] + %tmp174 = load uint* %tmp173 ; [#uses=1] + %tmp177 = and uint %tmp174, 4294967287 ; [#uses=1] + store uint %tmp177, uint* %tmp173 + %tmp180 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=1] + %tmp181 = load uint* %tmp180 ; [#uses=1] + %tmp185 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=2] + %tmp186 = load uint* %tmp185 ; [#uses=1] + %tmp183187 = shl uint %tmp181, ubyte 1 ; [#uses=1] + %tmp188 = and uint %tmp183187, 16 ; [#uses=1] + %tmp190 = and uint %tmp186, 4294967279 ; [#uses=1] + %tmp191 = or uint %tmp190, %tmp188 ; [#uses=1] + store uint %tmp191, uint* %tmp185 + %tmp193 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=1] + %tmp194 = load uint* %tmp193 ; [#uses=1] + %tmp198 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=2] + %tmp199 = load uint* %tmp198 ; [#uses=1] + %tmp196200 = shl uint %tmp194, ubyte 2 ; [#uses=1] + %tmp201 = and uint %tmp196200, 64 ; [#uses=1] + %tmp203 = and uint %tmp199, 4294967231 ; [#uses=1] + %tmp204 = or uint %tmp203, %tmp201 ; [#uses=1] + store uint %tmp204, uint* %tmp198 + %tmp206 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=1] + %tmp207 = load uint* %tmp206 ; [#uses=1] + %tmp211 = getelementptr %struct.attr_desc* null, int 0, uint 4 ; [#uses=2] + %tmp212 = load uint* %tmp211 ; [#uses=1] + %tmp209213 = shl uint %tmp207, ubyte 1 ; [#uses=1] + %tmp214 = and uint %tmp209213, 128 ; [#uses=1] + %tmp216 = and uint %tmp212, 4294967167 ; [#uses=1] + %tmp217 = or uint %tmp216, %tmp214 ; [#uses=1] + store uint %tmp217, uint* %tmp211 + ret void +} diff --git a/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll new file mode 100644 index 0000000..1026072 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-07-07-ComputeMaskedBits.ll @@ -0,0 +1,16 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=powerpc64-apple-darwin | grep extsw | wc -l | grep 2 + +%lens = external global ubyte* +%vals = external global int* + +int %test(int %i) { + %tmp = load ubyte** %lens + %tmp1 = getelementptr ubyte* %tmp, int %i + %tmp = load ubyte* %tmp1 + %tmp2 = cast ubyte %tmp to int + %tmp3 = load int** %vals + %tmp5 = sub int 1, %tmp2 + %tmp6 = getelementptr int* %tmp3, int %tmp5 + %tmp7 = load int* %tmp6 + ret int %tmp7 +} diff --git a/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll new file mode 100644 index 0000000..d71ba5a --- /dev/null +++ b/test/CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 + +void %img2buf(int %symbol_size_in_bytes, ushort* %ui16) { + %tmp93 = load ushort* null ; [#uses=1] + %tmp99 = call ushort %llvm.bswap.i16( ushort %tmp93 ) ; [#uses=1] + store ushort %tmp99, ushort* %ui16 + ret void +} + +declare ushort %llvm.bswap.i16(ushort) diff --git a/test/CodeGen/PowerPC/2006-08-11-RetVector.ll b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll new file mode 100644 index 0000000..cf0cd2c --- /dev/null +++ b/test/CodeGen/PowerPC/2006-08-11-RetVector.ll @@ -0,0 +1,8 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | grep vsldoi +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 | not grep vor + +<4 x float> %func(<4 x float> %fp0, <4 x float> %fp1) { + %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x uint> < uint 0, uint 1, uint 2, uint 7 > ; <<4 x float>> [#uses=1] + ret <4 x float> %tmp76 +} + diff --git a/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll new file mode 100644 index 0000000..287a79d --- /dev/null +++ b/test/CodeGen/PowerPC/2006-08-15-SelectionCrash.ll @@ -0,0 +1,38 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc + + %struct..0anon = type { int } + %struct.rtx_def = type { ushort, ubyte, ubyte, [1 x %struct..0anon] } + +implementation ; Functions: + +fastcc void %immed_double_const(int %i0, int %i1) { +entry: + %tmp1 = load uint* null ; [#uses=1] + switch uint %tmp1, label %bb103 [ + uint 1, label %bb + uint 3, label %bb + ] + +bb: ; preds = %entry, %entry + %tmp14 = setgt int 0, 31 ; [#uses=1] + br bool %tmp14, label %cond_next77, label %cond_next17 + +cond_next17: ; preds = %bb + ret void + +cond_next77: ; preds = %bb + %tmp79.not = setne int %i1, 0 ; [#uses=1] + %tmp84 = setlt int %i0, 0 ; [#uses=2] + %bothcond1 = or bool %tmp79.not, %tmp84 ; [#uses=1] + br bool %bothcond1, label %bb88, label %bb99 + +bb88: ; preds = %cond_next77 + %bothcond2 = and bool false, %tmp84 ; [#uses=0] + ret void + +bb99: ; preds = %cond_next77 + ret void + +bb103: ; preds = %entry + ret void +} diff --git a/test/CodeGen/PowerPC/2006-09-28-shift_64.ll b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll new file mode 100644 index 0000000..58d1f26 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-09-28-shift_64.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 +target endian = big +target pointersize = 64 +target triple = "powerpc64-apple-darwin8" + +implementation ; Functions: + +void %glArrayElement_CompExec() { +entry: + %tmp3 = and ulong 0, 18446744073701163007 ; [#uses=1] + br label %cond_true24 + +cond_false: ; preds = %cond_true24 + ret void + +cond_true24: ; preds = %cond_true24, %entry + %indvar.ph = phi uint [ 0, %entry ], [ %indvar.next, %cond_true24 ] ; [#uses=1] + %indvar = add uint 0, %indvar.ph ; [#uses=2] + %code.0 = cast uint %indvar to ubyte ; [#uses=1] + %tmp5 = add ubyte %code.0, 16 ; [#uses=1] + %tmp7 = shr ulong %tmp3, ubyte %tmp5 ; [#uses=1] + %tmp7 = cast ulong %tmp7 to int ; [#uses=1] + %tmp8 = and int %tmp7, 1 ; [#uses=1] + %tmp8 = seteq int %tmp8, 0 ; [#uses=1] + %indvar.next = add uint %indvar, 1 ; [#uses=1] + br bool %tmp8, label %cond_false, label %cond_true24 +} diff --git a/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll new file mode 100644 index 0000000..992e52a --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | \ +; RUN: llc -march=ppc32 -combiner-alias-analysis | grep f5 + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.2.0" + %struct.Point = type { double, double, double } + +implementation ; Functions: + +void %offset(%struct.Point* %pt, double %x, double %y, double %z) { +entry: + %tmp = getelementptr %struct.Point* %pt, int 0, uint 0 ; [#uses=2] + %tmp = load double* %tmp ; [#uses=1] + %tmp2 = add double %tmp, %x ; [#uses=1] + store double %tmp2, double* %tmp + %tmp6 = getelementptr %struct.Point* %pt, int 0, uint 1 ; [#uses=2] + %tmp7 = load double* %tmp6 ; [#uses=1] + %tmp9 = add double %tmp7, %y ; [#uses=1] + store double %tmp9, double* %tmp6 + %tmp13 = getelementptr %struct.Point* %pt, int 0, uint 2 ; [#uses=2] + %tmp14 = load double* %tmp13 ; [#uses=1] + %tmp16 = add double %tmp14, %z ; [#uses=1] + store double %tmp16, double* %tmp13 + ret void +} diff --git a/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll new file mode 100644 index 0000000..95b5312 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-13-Miscompile.ll @@ -0,0 +1,18 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep IMPLICIT_DEF + +void %foo(long %X) { +entry: + %tmp1 = and long %X, 3 ; [#uses=1] + %tmp = setgt long %tmp1, 2 ; [#uses=1] + br bool %tmp, label %UnifiedReturnBlock, label %cond_true + +cond_true: ; preds = %entry + %tmp = tail call int (...)* %bar( ) ; [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) + diff --git a/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll new file mode 100644 index 0000000..397ada7 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll @@ -0,0 +1,24 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep xor + +target endian = big +target pointersize = 32 +target triple = "powerpc-apple-darwin8.7.0" + +implementation ; Functions: + +void %foo(int %X) { +entry: + %tmp1 = and int %X, 3 ; [#uses=1] + %tmp2 = xor int %tmp1, 1 + %tmp = seteq int %tmp2, 0 ; [#uses=1] + br bool %tmp, label %UnifiedReturnBlock, label %cond_true + +cond_true: ; preds = %entry + tail call int (...)* %bar( ) ; [#uses=0] + ret void + +UnifiedReturnBlock: ; preds = %entry + ret void +} + +declare int %bar(...) diff --git a/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll new file mode 100644 index 0000000..c981c26 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll @@ -0,0 +1,6 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 + +int * %foo(uint %n) { + %A = alloca int, uint %n + ret int* %A +} diff --git a/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll new file mode 100644 index 0000000..a5476eb --- /dev/null +++ b/test/CodeGen/PowerPC/2006-11-10-DAGCombineMiscompile.ll @@ -0,0 +1,14 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi + +void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) { + %X = shl short %div.0.i.i.i.i, ubyte 1 ; [#uses=1] + %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; [#uses=2] + %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; [#uses=2] + + %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; [#uses=1] + %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; [#uses=1] + %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; [#uses=1] + store short %div.0.be.i.i.i.i, short* %P + ret void +} + diff --git a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll new file mode 100644 index 0000000..0411eb5 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll @@ -0,0 +1,10 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 -mcpu=g5 + +void %glgRunProcessor15() { + %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x uint> < uint 0, uint 1, uint 2, uint 7 > ; <<4 x float>> [#uses=1] + %tmp3030030304.i = cast <4 x float> %tmp26355.i to <8 x short> ; <<8 x short>> [#uses=1] + %tmp30305.i = shufflevector <8 x short> zeroinitializer, <8 x short> %tmp3030030304.i, <8 x uint> < uint 1, uint 3, uint 5, uint 7, uint 9, uint 11, uint 13, uint 15 > ; <<8 x short>> [#uses=1] + %tmp30305.i = cast <8 x short> %tmp30305.i to <4 x int> ; <<4 x int>> [#uses=1] + store <4 x int> %tmp30305.i, <4 x int>* null + ret void +} diff --git a/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll new file mode 100644 index 0000000..f6103e5 --- /dev/null +++ b/test/CodeGen/PowerPC/2006-12-07-LargeAlloca.ll @@ -0,0 +1,26 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 +; RUN: llvm-upgrade < %s | llvm-as | llc + +void %bitap() { +entry: + %RMask.i = alloca [256 x uint], align 16 ; <[256 x uint]*> [#uses=1] + %buffer = alloca [147456 x sbyte], align 16 ; <[147456 x sbyte]*> [#uses=0] + br bool false, label %bb19, label %bb.preheader + +bb.preheader: ; preds = %entry + ret void + +bb19: ; preds = %entry + br bool false, label %bb12.i, label %cond_next39 + +bb12.i: ; preds = %bb12.i, %bb19 + %i.0.i = phi uint [ %tmp11.i, %bb12.i ], [ 0, %bb19 ] ; [#uses=2] + %tmp9.i = getelementptr [256 x uint]* %RMask.i, int 0, uint %i.0.i ; [#uses=1] + store uint 0, uint* %tmp9.i + %tmp11.i = add uint %i.0.i, 1 ; [#uses=1] + br label %bb12.i + +cond_next39: ; preds = %bb19 + ret void +} diff --git a/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll new file mode 100644 index 0000000..6fa410e --- /dev/null +++ b/test/CodeGen/PowerPC/2006-12-07-SelectCrash.ll @@ -0,0 +1,27 @@ +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc64 +; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 +; RUN: llvm-upgrade < %s | llvm-as | llc + +%qsz.b = external global bool ; [#uses=1] + +implementation ; Functions: + +fastcc void %qst() { +entry: + br bool true, label %cond_next71, label %cond_true + +cond_true: ; preds = %entry + ret void + +cond_next71: ; preds = %entry + %tmp73.b = load bool* %qsz.b ; [#uses=1] + %ii.4.ph = select bool %tmp73.b, ulong 4, ulong 0 ; [#uses=1] + br label %bb139 + +bb82: ; preds = %bb139 + ret void + +bb139: ; preds = %bb139, %cond_next71 + %exitcond89 = seteq ulong 0, %ii.4.ph ; [#uses=1] + br bool %exitcond89, label %bb82, label %bb139 +} diff --git a/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll b/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll new file mode 100644 index 0000000..19fedf9 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-04-ArgExtension.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep extsb +; RUN: llvm-as < %s | llc -march=ppc32 | grep extsh + +define i32 @p1(i8 %c, i16 %s) { +entry: + %tmp = sext i8 %c to i32 ; [#uses=1] + %tmp1 = sext i16 %s to i32 ; [#uses=1] + %tmp2 = add i32 %tmp1, %tmp ; [#uses=1] + ret i32 %tmp2 +} diff --git a/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll new file mode 100644 index 0000000..d9374ed --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: grep cntlzw + +define i32 @foo() { +entry: + %retval = alloca i32, align 4 ; [#uses=2] + %temp = alloca i32, align 4 ; [#uses=2] + %ctz_x = alloca i32, align 4 ; [#uses=3] + %ctz_c = alloca i32, align 4 ; [#uses=2] + "alloca point" = bitcast i32 0 to i32 ; [#uses=0] + store i32 61440, i32* %ctz_x + %tmp = load i32* %ctz_x ; [#uses=1] + %tmp1 = sub i32 0, %tmp ; [#uses=1] + %tmp2 = load i32* %ctz_x ; [#uses=1] + %tmp3 = and i32 %tmp1, %tmp2 ; [#uses=1] + %tmp4 = call i32 asm "$(cntlz$|cntlzw$) $0,$1", "=r,r,~{dirflag},~{fpsr},~{flags}"( i32 %tmp3 ) ; [#uses=1] + store i32 %tmp4, i32* %ctz_c + %tmp5 = load i32* %ctz_c ; [#uses=1] + store i32 %tmp5, i32* %temp + %tmp6 = load i32* %temp ; [#uses=1] + store i32 %tmp6, i32* %retval + br label %return + +return: ; preds = %entry + %retval2 = load i32* %retval ; [#uses=1] + ret i32 %retval2 +} diff --git a/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll b/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll new file mode 100644 index 0000000..f2c951e --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=ppc32 +; RUN: llvm-as < %s | llc -march=ppc64 + +define i16 @test(i8* %d1, i16* %d2) { + %tmp237 = call i16 asm "lhbrx $0, $2, $1", "=r,r,bO,m"( i8* %d1, i32 0, i16* %d2 ) ; [#uses=1] + ret i16 %tmp237 +} diff --git a/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll b/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll new file mode 100644 index 0000000..d476462 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=ppc32 +; RUN: llvm-as < %s | llc -march=ppc64 + +; Test two things: 1) that a frameidx can be rewritten in an inline asm +; 2) that inline asms can handle reg+imm addr modes. + + %struct.A = type { i32, i32 } + + +define void @test1() { +entry: + %Out = alloca %struct.A, align 4 ; <%struct.A*> [#uses=1] + %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 1 + %tmp5 = call i32 asm "lwbrx $0, $1", "=r,m"(i32* %tmp2 ) + ret void +} + +define void @test2() { +entry: + %Out = alloca %struct.A, align 4 ; <%struct.A*> [#uses=1] + %tmp2 = getelementptr %struct.A* %Out, i32 0, i32 0 ; [#uses=1] + %tmp5 = call i32 asm "lwbrx $0, $2, $1", "=r,r,bO,m"( i8* null, i32 0, i32* %tmp2 ) ; [#uses=0] + ret void +} diff --git a/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll b/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll new file mode 100644 index 0000000..97f6a01 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-02-16-AlignPacked.ll @@ -0,0 +1,4 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | \ +; RUN: grep align.*3 + +@X = global <{i32, i32}> <{ i32 1, i32 123 }> diff --git a/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll b/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll new file mode 100644 index 0000000..5a3d3b5 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc + +target datalayout = "E-p:32:32" +target triple = "powerpc-apple-darwin8.8.0" + + +define void @blargh() { +entry: + %tmp4 = call i32 asm "rlwimi $0,$2,$3,$4,$5", "=r,0,r,n,n,n"( i32 0, i32 0, i32 0, i32 24, i32 31 ) ; [#uses=0] + unreachable +} diff --git a/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll b/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll new file mode 100644 index 0000000..3a7d393 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-02-23-lr-saved-twice.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc | grep mflr | wc -l | grep 1 + +target datalayout = "e-p:32:32" +target triple = "powerpc-apple-darwin8" +@str = internal constant [18 x i8] c"hello world!, %d\0A\00" ; <[18 x i8]*> [#uses=1] + + +define i32 @main() { +entry: + %tmp = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([18 x i8]* @str, i32 0, i32 0) ) ; [#uses=0] + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll new file mode 100644 index 0000000..1ea6174 --- /dev/null +++ b/test/CodeGen/PowerPC/2007-03-24-cntlzd.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=ppc64 -mcpu=g5 | grep cntlzd + +define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) { + %tmp19 = load i64* %t + %tmp23 = tail call i32 @llvm.ctlz.i64( i64 %tmp19 ) ; [#uses=1] + %tmp89 = add i32 %tmp23, -64 ; [#uses=1] + %tmp90 = add i32 %tmp89, 0 ; [#uses=1] + ret i32 %tmp90 +} + +declare i32 @llvm.ctlz.i64(i64) diff --git a/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll new file mode 100644 index 0000000..04ca3bb --- /dev/null +++ b/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll @@ -0,0 +1,1801 @@ +; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 + +define void @test(<4 x float>*, { { i16, i16, i32 } }*) { +xOperationInitMasks.exit: + %.sub7896 = getelementptr [4 x <4 x i32>]* null, i32 0, i32 0 ; <<4 x i32>*> [#uses=24] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 175, i32 3 ; <<4 x float>*>:2 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 2 ; <<4 x float>*>:3 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 3 ; <<4 x float>*>:4 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 1 ; <<4 x float>*>:5 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 2 ; <<4 x float>*>:6 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 3 ; <<4 x float>*>:7 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 1 ; <<4 x float>*>:8 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 2 ; <<4 x float>*>:9 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 3 ; <<4 x float>*>:10 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 1 ; <<4 x float>*>:11 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 2 ; <<4 x float>*>:12 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 171, i32 3 ; <<4 x float>*>:13 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 1 ; <<4 x float>*>:14 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 2 ; <<4 x float>*>:15 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 170, i32 3 ; <<4 x float>*>:16 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 1 ; <<4 x float>*>:17 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 2 ; <<4 x float>*>:18 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 169, i32 3 ; <<4 x float>*>:19 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 1 ; <<4 x float>*>:20 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 2 ; <<4 x float>*>:21 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 168, i32 3 ; <<4 x float>*>:22 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 1 ; <<4 x float>*>:23 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 2 ; <<4 x float>*>:24 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 167, i32 3 ; <<4 x float>*>:25 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 1 ; <<4 x float>*>:26 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 2 ; <<4 x float>*>:27 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 166, i32 3 ; <<4 x float>*>:28 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 1 ; <<4 x float>*>:29 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 2 ; <<4 x float>*>:30 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 165, i32 3 ; <<4 x float>*>:31 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 1 ; <<4 x float>*>:32 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 2 ; <<4 x float>*>:33 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 164, i32 3 ; <<4 x float>*>:34 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 1 ; <<4 x float>*>:35 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 2 ; <<4 x float>*>:36 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 163, i32 3 ; <<4 x float>*>:37 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 1 ; <<4 x float>*>:38 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 2 ; <<4 x float>*>:39 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 162, i32 3 ; <<4 x float>*>:40 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 1 ; <<4 x float>*>:41 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 2 ; <<4 x float>*>:42 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 161, i32 3 ; <<4 x float>*>:43 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 1 ; <<4 x float>*>:44 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 2 ; <<4 x float>*>:45 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 160, i32 3 ; <<4 x float>*>:46 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 1 ; <<4 x float>*>:47 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 2 ; <<4 x float>*>:48 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 159, i32 3 ; <<4 x float>*>:49 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 1 ; <<4 x float>*>:50 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 2 ; <<4 x float>*>:51 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 158, i32 3 ; <<4 x float>*>:52 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 1 ; <<4 x float>*>:53 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 2 ; <<4 x float>*>:54 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 157, i32 3 ; <<4 x float>*>:55 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 1 ; <<4 x float>*>:56 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 2 ; <<4 x float>*>:57 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 156, i32 3 ; <<4 x float>*>:58 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 1 ; <<4 x float>*>:59 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 2 ; <<4 x float>*>:60 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 155, i32 3 ; <<4 x float>*>:61 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 1 ; <<4 x float>*>:62 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 2 ; <<4 x float>*>:63 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 154, i32 3 ; <<4 x float>*>:64 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 1 ; <<4 x float>*>:65 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 2 ; <<4 x float>*>:66 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 153, i32 3 ; <<4 x float>*>:67 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 1 ; <<4 x float>*>:68 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 2 ; <<4 x float>*>:69 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 152, i32 3 ; <<4 x float>*>:70 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 1 ; <<4 x float>*>:71 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 2 ; <<4 x float>*>:72 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 151, i32 3 ; <<4 x float>*>:73 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 1 ; <<4 x float>*>:74 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 2 ; <<4 x float>*>:75 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 150, i32 3 ; <<4 x float>*>:76 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 1 ; <<4 x float>*>:77 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 2 ; <<4 x float>*>:78 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 149, i32 3 ; <<4 x float>*>:79 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 1 ; <<4 x float>*>:80 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 2 ; <<4 x float>*>:81 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 148, i32 3 ; <<4 x float>*>:82 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 1 ; <<4 x float>*>:83 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 2 ; <<4 x float>*>:84 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 147, i32 3 ; <<4 x float>*>:85 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 1 ; <<4 x float>*>:86 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 2 ; <<4 x float>*>:87 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 146, i32 3 ; <<4 x float>*>:88 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 1 ; <<4 x float>*>:89 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 2 ; <<4 x float>*>:90 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 145, i32 3 ; <<4 x float>*>:91 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 144, i32 1 ; <<4 x float>*>:92 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 144, i32 2 ; <<4 x float>*>:93 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 144, i32 3 ; <<4 x float>*>:94 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 1 ; <<4 x float>*>:95 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 2 ; <<4 x float>*>:96 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 143, i32 3 ; <<4 x float>*>:97 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 142, i32 1 ; <<4 x float>*>:98 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 142, i32 2 ; <<4 x float>*>:99 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 142, i32 3 ; <<4 x float>*>:100 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 141, i32 1 ; <<4 x float>*>:101 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 141, i32 2 ; <<4 x float>*>:102 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 141, i32 3 ; <<4 x float>*>:103 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 140, i32 1 ; <<4 x float>*>:104 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 140, i32 2 ; <<4 x float>*>:105 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 140, i32 3 ; <<4 x float>*>:106 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 139, i32 1 ; <<4 x float>*>:107 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 139, i32 2 ; <<4 x float>*>:108 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 139, i32 3 ; <<4 x float>*>:109 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 138, i32 1 ; <<4 x float>*>:110 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 138, i32 2 ; <<4 x float>*>:111 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 138, i32 3 ; <<4 x float>*>:112 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 137, i32 1 ; <<4 x float>*>:113 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 137, i32 2 ; <<4 x float>*>:114 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 137, i32 3 ; <<4 x float>*>:115 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 136, i32 1 ; <<4 x float>*>:116 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 136, i32 2 ; <<4 x float>*>:117 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 136, i32 3 ; <<4 x float>*>:118 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 135, i32 1 ; <<4 x float>*>:119 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 135, i32 2 ; <<4 x float>*>:120 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 135, i32 3 ; <<4 x float>*>:121 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 134, i32 1 ; <<4 x float>*>:122 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 134, i32 2 ; <<4 x float>*>:123 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 134, i32 3 ; <<4 x float>*>:124 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 133, i32 1 ; <<4 x float>*>:125 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 133, i32 2 ; <<4 x float>*>:126 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 133, i32 3 ; <<4 x float>*>:127 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 1 ; <<4 x float>*>:128 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 2 ; <<4 x float>*>:129 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 132, i32 3 ; <<4 x float>*>:130 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 131, i32 1 ; <<4 x float>*>:131 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 131, i32 2 ; <<4 x float>*>:132 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 131, i32 3 ; <<4 x float>*>:133 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 130, i32 1 ; <<4 x float>*>:134 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 130, i32 2 ; <<4 x float>*>:135 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 130, i32 3 ; <<4 x float>*>:136 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 1 ; <<4 x float>*>:137 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 2 ; <<4 x float>*>:138 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 129, i32 3 ; <<4 x float>*>:139 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 1 ; <<4 x float>*>:140 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 2 ; <<4 x float>*>:141 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 128, i32 3 ; <<4 x float>*>:142 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 1 ; <<4 x float>*>:143 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 2 ; <<4 x float>*>:144 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 127, i32 3 ; <<4 x float>*>:145 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 1 ; <<4 x float>*>:146 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 2 ; <<4 x float>*>:147 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 126, i32 3 ; <<4 x float>*>:148 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 1 ; <<4 x float>*>:149 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 2 ; <<4 x float>*>:150 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 125, i32 3 ; <<4 x float>*>:151 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 1 ; <<4 x float>*>:152 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 2 ; <<4 x float>*>:153 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 124, i32 3 ; <<4 x float>*>:154 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 1 ; <<4 x float>*>:155 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 2 ; <<4 x float>*>:156 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 123, i32 3 ; <<4 x float>*>:157 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 1 ; <<4 x float>*>:158 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 2 ; <<4 x float>*>:159 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 122, i32 3 ; <<4 x float>*>:160 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 1 ; <<4 x float>*>:161 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 2 ; <<4 x float>*>:162 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 121, i32 3 ; <<4 x float>*>:163 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 1 ; <<4 x float>*>:164 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 2 ; <<4 x float>*>:165 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 120, i32 3 ; <<4 x float>*>:166 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 1 ; <<4 x float>*>:167 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 2 ; <<4 x float>*>:168 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 119, i32 3 ; <<4 x float>*>:169 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 1 ; <<4 x float>*>:170 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 2 ; <<4 x float>*>:171 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 118, i32 3 ; <<4 x float>*>:172 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 1 ; <<4 x float>*>:173 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 2 ; <<4 x float>*>:174 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 117, i32 3 ; <<4 x float>*>:175 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 1 ; <<4 x float>*>:176 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 2 ; <<4 x float>*>:177 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 116, i32 3 ; <<4 x float>*>:178 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 1 ; <<4 x float>*>:179 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 2 ; <<4 x float>*>:180 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 115, i32 3 ; <<4 x float>*>:181 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 1 ; <<4 x float>*>:182 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 2 ; <<4 x float>*>:183 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 114, i32 3 ; <<4 x float>*>:184 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 1 ; <<4 x float>*>:185 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 2 ; <<4 x float>*>:186 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 113, i32 3 ; <<4 x float>*>:187 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 1 ; <<4 x float>*>:188 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 2 ; <<4 x float>*>:189 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 112, i32 3 ; <<4 x float>*>:190 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 1 ; <<4 x float>*>:191 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 2 ; <<4 x float>*>:192 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 111, i32 3 ; <<4 x float>*>:193 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 1 ; <<4 x float>*>:194 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 2 ; <<4 x float>*>:195 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 110, i32 3 ; <<4 x float>*>:196 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 1 ; <<4 x float>*>:197 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 2 ; <<4 x float>*>:198 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 109, i32 3 ; <<4 x float>*>:199 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 1 ; <<4 x float>*>:200 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 2 ; <<4 x float>*>:201 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 108, i32 3 ; <<4 x float>*>:202 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 1 ; <<4 x float>*>:203 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 2 ; <<4 x float>*>:204 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 107, i32 3 ; <<4 x float>*>:205 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 1 ; <<4 x float>*>:206 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 2 ; <<4 x float>*>:207 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 106, i32 3 ; <<4 x float>*>:208 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 1 ; <<4 x float>*>:209 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 2 ; <<4 x float>*>:210 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 105, i32 3 ; <<4 x float>*>:211 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 1 ; <<4 x float>*>:212 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 2 ; <<4 x float>*>:213 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 104, i32 3 ; <<4 x float>*>:214 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 1 ; <<4 x float>*>:215 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 2 ; <<4 x float>*>:216 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 103, i32 3 ; <<4 x float>*>:217 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 1 ; <<4 x float>*>:218 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 2 ; <<4 x float>*>:219 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 102, i32 3 ; <<4 x float>*>:220 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 1 ; <<4 x float>*>:221 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 2 ; <<4 x float>*>:222 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 101, i32 3 ; <<4 x float>*>:223 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 1 ; <<4 x float>*>:224 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 2 ; <<4 x float>*>:225 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 100, i32 3 ; <<4 x float>*>:226 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 1 ; <<4 x float>*>:227 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 2 ; <<4 x float>*>:228 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 99, i32 3 ; <<4 x float>*>:229 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 1 ; <<4 x float>*>:230 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 2 ; <<4 x float>*>:231 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 98, i32 3 ; <<4 x float>*>:232 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 1 ; <<4 x float>*>:233 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 2 ; <<4 x float>*>:234 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 97, i32 3 ; <<4 x float>*>:235 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 1 ; <<4 x float>*>:236 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 2 ; <<4 x float>*>:237 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 96, i32 3 ; <<4 x float>*>:238 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 1 ; <<4 x float>*>:239 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 2 ; <<4 x float>*>:240 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 95, i32 3 ; <<4 x float>*>:241 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 1 ; <<4 x float>*>:242 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 2 ; <<4 x float>*>:243 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 94, i32 3 ; <<4 x float>*>:244 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 1 ; <<4 x float>*>:245 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 2 ; <<4 x float>*>:246 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 93, i32 3 ; <<4 x float>*>:247 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 1 ; <<4 x float>*>:248 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 2 ; <<4 x float>*>:249 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 92, i32 3 ; <<4 x float>*>:250 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 1 ; <<4 x float>*>:251 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 2 ; <<4 x float>*>:252 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 91, i32 3 ; <<4 x float>*>:253 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 1 ; <<4 x float>*>:254 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 2 ; <<4 x float>*>:255 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 90, i32 3 ; <<4 x float>*>:256 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 1 ; <<4 x float>*>:257 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 2 ; <<4 x float>*>:258 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 89, i32 3 ; <<4 x float>*>:259 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 1 ; <<4 x float>*>:260 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 2 ; <<4 x float>*>:261 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 88, i32 3 ; <<4 x float>*>:262 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 1 ; <<4 x float>*>:263 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 2 ; <<4 x float>*>:264 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 87, i32 3 ; <<4 x float>*>:265 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 1 ; <<4 x float>*>:266 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 2 ; <<4 x float>*>:267 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 86, i32 3 ; <<4 x float>*>:268 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 1 ; <<4 x float>*>:269 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 2 ; <<4 x float>*>:270 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 85, i32 3 ; <<4 x float>*>:271 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 84, i32 1 ; <<4 x float>*>:272 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 84, i32 2 ; <<4 x float>*>:273 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 84, i32 3 ; <<4 x float>*>:274 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 83, i32 1 ; <<4 x float>*>:275 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 83, i32 2 ; <<4 x float>*>:276 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 83, i32 3 ; <<4 x float>*>:277 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 82, i32 1 ; <<4 x float>*>:278 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 82, i32 2 ; <<4 x float>*>:279 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 82, i32 3 ; <<4 x float>*>:280 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 81, i32 1 ; <<4 x float>*>:281 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 81, i32 2 ; <<4 x float>*>:282 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 81, i32 3 ; <<4 x float>*>:283 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 80, i32 1 ; <<4 x float>*>:284 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 80, i32 2 ; <<4 x float>*>:285 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 80, i32 3 ; <<4 x float>*>:286 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 79, i32 1 ; <<4 x float>*>:287 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 79, i32 2 ; <<4 x float>*>:288 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 79, i32 3 ; <<4 x float>*>:289 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 78, i32 1 ; <<4 x float>*>:290 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 78, i32 2 ; <<4 x float>*>:291 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 78, i32 3 ; <<4 x float>*>:292 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 77, i32 1 ; <<4 x float>*>:293 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 77, i32 2 ; <<4 x float>*>:294 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 77, i32 3 ; <<4 x float>*>:295 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 76, i32 1 ; <<4 x float>*>:296 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 76, i32 2 ; <<4 x float>*>:297 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 76, i32 3 ; <<4 x float>*>:298 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 75, i32 1 ; <<4 x float>*>:299 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 75, i32 2 ; <<4 x float>*>:300 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 75, i32 3 ; <<4 x float>*>:301 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 74, i32 1 ; <<4 x float>*>:302 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 74, i32 2 ; <<4 x float>*>:303 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 74, i32 3 ; <<4 x float>*>:304 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 73, i32 1 ; <<4 x float>*>:305 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 73, i32 2 ; <<4 x float>*>:306 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 73, i32 3 ; <<4 x float>*>:307 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 72, i32 1 ; <<4 x float>*>:308 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 72, i32 2 ; <<4 x float>*>:309 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 72, i32 3 ; <<4 x float>*>:310 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 71, i32 1 ; <<4 x float>*>:311 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 71, i32 2 ; <<4 x float>*>:312 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 71, i32 3 ; <<4 x float>*>:313 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 70, i32 1 ; <<4 x float>*>:314 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 70, i32 2 ; <<4 x float>*>:315 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 70, i32 3 ; <<4 x float>*>:316 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 69, i32 1 ; <<4 x float>*>:317 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 69, i32 2 ; <<4 x float>*>:318 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 69, i32 3 ; <<4 x float>*>:319 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 68, i32 1 ; <<4 x float>*>:320 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 68, i32 2 ; <<4 x float>*>:321 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 68, i32 3 ; <<4 x float>*>:322 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 67, i32 1 ; <<4 x float>*>:323 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 67, i32 2 ; <<4 x float>*>:324 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 67, i32 3 ; <<4 x float>*>:325 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 66, i32 1 ; <<4 x float>*>:326 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 66, i32 2 ; <<4 x float>*>:327 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 66, i32 3 ; <<4 x float>*>:328 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 65, i32 1 ; <<4 x float>*>:329 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 65, i32 2 ; <<4 x float>*>:330 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 65, i32 3 ; <<4 x float>*>:331 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 64, i32 1 ; <<4 x float>*>:332 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 64, i32 2 ; <<4 x float>*>:333 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 64, i32 3 ; <<4 x float>*>:334 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 1 ; <<4 x float>*>:335 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 2 ; <<4 x float>*>:336 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 63, i32 3 ; <<4 x float>*>:337 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 62, i32 1 ; <<4 x float>*>:338 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 62, i32 2 ; <<4 x float>*>:339 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 62, i32 3 ; <<4 x float>*>:340 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 61, i32 1 ; <<4 x float>*>:341 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 61, i32 2 ; <<4 x float>*>:342 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 61, i32 3 ; <<4 x float>*>:343 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 60, i32 1 ; <<4 x float>*>:344 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 60, i32 2 ; <<4 x float>*>:345 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 60, i32 3 ; <<4 x float>*>:346 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 59, i32 1 ; <<4 x float>*>:347 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 59, i32 2 ; <<4 x float>*>:348 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 59, i32 3 ; <<4 x float>*>:349 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 1 ; <<4 x float>*>:350 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 2 ; <<4 x float>*>:351 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 58, i32 3 ; <<4 x float>*>:352 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 57, i32 1 ; <<4 x float>*>:353 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 57, i32 2 ; <<4 x float>*>:354 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 57, i32 3 ; <<4 x float>*>:355 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 1 ; <<4 x float>*>:356 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 2 ; <<4 x float>*>:357 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 56, i32 3 ; <<4 x float>*>:358 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 1 ; <<4 x float>*>:359 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 2 ; <<4 x float>*>:360 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 55, i32 3 ; <<4 x float>*>:361 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 1 ; <<4 x float>*>:362 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 2 ; <<4 x float>*>:363 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 54, i32 3 ; <<4 x float>*>:364 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 1 ; <<4 x float>*>:365 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 2 ; <<4 x float>*>:366 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 53, i32 3 ; <<4 x float>*>:367 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 1 ; <<4 x float>*>:368 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 2 ; <<4 x float>*>:369 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 52, i32 3 ; <<4 x float>*>:370 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 1 ; <<4 x float>*>:371 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 2 ; <<4 x float>*>:372 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 51, i32 3 ; <<4 x float>*>:373 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 1 ; <<4 x float>*>:374 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 2 ; <<4 x float>*>:375 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 50, i32 3 ; <<4 x float>*>:376 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 1 ; <<4 x float>*>:377 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 2 ; <<4 x float>*>:378 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 49, i32 3 ; <<4 x float>*>:379 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 1 ; <<4 x float>*>:380 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 2 ; <<4 x float>*>:381 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 48, i32 3 ; <<4 x float>*>:382 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 1 ; <<4 x float>*>:383 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 2 ; <<4 x float>*>:384 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 47, i32 3 ; <<4 x float>*>:385 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 1 ; <<4 x float>*>:386 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 2 ; <<4 x float>*>:387 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 46, i32 3 ; <<4 x float>*>:388 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 1 ; <<4 x float>*>:389 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 2 ; <<4 x float>*>:390 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 45, i32 3 ; <<4 x float>*>:391 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 1 ; <<4 x float>*>:392 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 2 ; <<4 x float>*>:393 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 44, i32 3 ; <<4 x float>*>:394 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 1 ; <<4 x float>*>:395 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 2 ; <<4 x float>*>:396 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 43, i32 3 ; <<4 x float>*>:397 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 1 ; <<4 x float>*>:398 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 2 ; <<4 x float>*>:399 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 42, i32 3 ; <<4 x float>*>:400 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 1 ; <<4 x float>*>:401 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 2 ; <<4 x float>*>:402 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 41, i32 3 ; <<4 x float>*>:403 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 1 ; <<4 x float>*>:404 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 2 ; <<4 x float>*>:405 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 40, i32 3 ; <<4 x float>*>:406 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 1 ; <<4 x float>*>:407 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 2 ; <<4 x float>*>:408 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 39, i32 3 ; <<4 x float>*>:409 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 1 ; <<4 x float>*>:410 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 2 ; <<4 x float>*>:411 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 38, i32 3 ; <<4 x float>*>:412 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 1 ; <<4 x float>*>:413 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 2 ; <<4 x float>*>:414 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 37, i32 3 ; <<4 x float>*>:415 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 1 ; <<4 x float>*>:416 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 2 ; <<4 x float>*>:417 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 36, i32 3 ; <<4 x float>*>:418 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 1 ; <<4 x float>*>:419 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 2 ; <<4 x float>*>:420 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 35, i32 3 ; <<4 x float>*>:421 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 1 ; <<4 x float>*>:422 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 2 ; <<4 x float>*>:423 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 34, i32 3 ; <<4 x float>*>:424 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 1 ; <<4 x float>*>:425 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 2 ; <<4 x float>*>:426 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 33, i32 3 ; <<4 x float>*>:427 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 1 ; <<4 x float>*>:428 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 2 ; <<4 x float>*>:429 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 32, i32 3 ; <<4 x float>*>:430 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 1 ; <<4 x float>*>:431 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 2 ; <<4 x float>*>:432 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 31, i32 3 ; <<4 x float>*>:433 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 1 ; <<4 x float>*>:434 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 2 ; <<4 x float>*>:435 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 30, i32 3 ; <<4 x float>*>:436 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 1 ; <<4 x float>*>:437 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 2 ; <<4 x float>*>:438 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 29, i32 3 ; <<4 x float>*>:439 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 1 ; <<4 x float>*>:440 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 2 ; <<4 x float>*>:441 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 28, i32 3 ; <<4 x float>*>:442 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 1 ; <<4 x float>*>:443 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 2 ; <<4 x float>*>:444 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 27, i32 3 ; <<4 x float>*>:445 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 1 ; <<4 x float>*>:446 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 2 ; <<4 x float>*>:447 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 26, i32 3 ; <<4 x float>*>:448 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 25, i32 1 ; <<4 x float>*>:449 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 25, i32 2 ; <<4 x float>*>:450 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 25, i32 3 ; <<4 x float>*>:451 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 24, i32 1 ; <<4 x float>*>:452 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 24, i32 2 ; <<4 x float>*>:453 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 24, i32 3 ; <<4 x float>*>:454 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 23, i32 1 ; <<4 x float>*>:455 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 23, i32 2 ; <<4 x float>*>:456 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 23, i32 3 ; <<4 x float>*>:457 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 22, i32 1 ; <<4 x float>*>:458 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 22, i32 2 ; <<4 x float>*>:459 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 22, i32 3 ; <<4 x float>*>:460 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 21, i32 1 ; <<4 x float>*>:461 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 21, i32 2 ; <<4 x float>*>:462 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 21, i32 3 ; <<4 x float>*>:463 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 20, i32 1 ; <<4 x float>*>:464 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 20, i32 2 ; <<4 x float>*>:465 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 20, i32 3 ; <<4 x float>*>:466 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 19, i32 1 ; <<4 x float>*>:467 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 19, i32 2 ; <<4 x float>*>:468 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 19, i32 3 ; <<4 x float>*>:469 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 18, i32 1 ; <<4 x float>*>:470 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 18, i32 2 ; <<4 x float>*>:471 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 18, i32 3 ; <<4 x float>*>:472 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 17, i32 1 ; <<4 x float>*>:473 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 17, i32 2 ; <<4 x float>*>:474 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 17, i32 3 ; <<4 x float>*>:475 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 16, i32 1 ; <<4 x float>*>:476 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 16, i32 2 ; <<4 x float>*>:477 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 16, i32 3 ; <<4 x float>*>:478 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 15, i32 1 ; <<4 x float>*>:479 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 15, i32 2 ; <<4 x float>*>:480 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 15, i32 3 ; <<4 x float>*>:481 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 14, i32 1 ; <<4 x float>*>:482 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 14, i32 2 ; <<4 x float>*>:483 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 14, i32 3 ; <<4 x float>*>:484 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 1 ; <<4 x float>*>:485 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:486 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:487 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:488 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 2 ; <<4 x float>*>:489 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 3 ; <<4 x float>*>:490 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 180, i32 1 ; <<4 x float>*>:491 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 180, i32 2 ; <<4 x float>*>:492 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 180, i32 3 ; <<4 x float>*>:493 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 181, i32 1 ; <<4 x float>*>:494 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 181, i32 2 ; <<4 x float>*>:495 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 181, i32 3 ; <<4 x float>*>:496 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 182, i32 1 ; <<4 x float>*>:497 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 182, i32 2 ; <<4 x float>*>:498 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 182, i32 3 ; <<4 x float>*>:499 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 183, i32 1 ; <<4 x float>*>:500 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 183, i32 2 ; <<4 x float>*>:501 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 183, i32 3 ; <<4 x float>*>:502 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 1 ; <<4 x float>*>:503 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 2 ; <<4 x float>*>:504 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 184, i32 3 ; <<4 x float>*>:505 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 1 ; <<4 x float>*>:506 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 2 ; <<4 x float>*>:507 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 185, i32 3 ; <<4 x float>*>:508 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 190, i32 1 ; <<4 x float>*>:509 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 190, i32 2 ; <<4 x float>*>:510 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 190, i32 3 ; <<4 x float>*>:511 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 9, i32 1 ; <<4 x float>*>:512 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 9, i32 2 ; <<4 x float>*>:513 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 9, i32 3 ; <<4 x float>*>:514 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 10, i32 1 ; <<4 x float>*>:515 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 10, i32 2 ; <<4 x float>*>:516 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 10, i32 3 ; <<4 x float>*>:517 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 1 ; <<4 x float>*>:518 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 2 ; <<4 x float>*>:519 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 11, i32 3 ; <<4 x float>*>:520 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 1 ; <<4 x float>*>:521 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 2 ; <<4 x float>*>:522 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 12, i32 3 ; <<4 x float>*>:523 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 1 ; <<4 x float>*>:524 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 2 ; <<4 x float>*>:525 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 13, i32 3 ; <<4 x float>*>:526 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 1 ; <<4 x float>*>:527 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 2 ; <<4 x float>*>:528 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 5, i32 3 ; <<4 x float>*>:529 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 1 ; <<4 x float>*>:530 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 2 ; <<4 x float>*>:531 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:532 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:533 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:534 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:535 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 1 ; <<4 x float>*>:536 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 2 ; <<4 x float>*>:537 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 6, i32 3 ; <<4 x float>*>:538 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 1 ; <<4 x float>*>:539 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 2 ; <<4 x float>*>:540 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 7, i32 3 ; <<4 x float>*>:541 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 1 ; <<4 x float>*>:542 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 2 ; <<4 x float>*>:543 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 186, i32 3 ; <<4 x float>*>:544 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 1 ; <<4 x float>*>:545 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 2 ; <<4 x float>*>:546 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 187, i32 3 ; <<4 x float>*>:547 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 1 ; <<4 x float>*>:548 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 2 ; <<4 x float>*>:549 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 8, i32 3 ; <<4 x float>*>:550 [#uses=0] + load <4 x float>* null ; <<4 x float>>:551 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:552 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 2 ; <<4 x float>*>:553 [#uses=1] + load <4 x float>* %553 ; <<4 x float>>:554 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 3 ; <<4 x float>*>:555 [#uses=0] + shufflevector <4 x float> %554, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:556 [#uses=1] + call <4 x i32> @llvm.ppc.altivec.vcmpgtfp( <4 x float> zeroinitializer, <4 x float> %556 ) ; <<4 x i32>>:557 [#uses=0] + bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:558 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 0 ; <<4 x float>*>:559 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:560 [#uses=1] + store <4 x float> zeroinitializer, <4 x float>* %560 + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 3 ; <<4 x float>*>:561 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 1 ; <<4 x float>*>:562 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 189, i32 2 ; <<4 x float>*>:563 [#uses=0] + load <4 x i32>* %.sub7896 ; <<4 x i32>>:564 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>>:565 [#uses=1] + store <4 x float> %565, <4 x float>* null + icmp eq i32 0, 0 ; :566 [#uses=1] + br i1 %566, label %.critedge, label %xPIF.exit + +.critedge: ; preds = %xOperationInitMasks.exit + getelementptr [4 x <4 x i32>]* null, i32 0, i32 3 ; <<4 x i32>*>:567 [#uses=0] + and <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:568 [#uses=0] + or <4 x i32> zeroinitializer, zeroinitializer ; <<4 x i32>>:569 [#uses=0] + icmp eq i32 0, 0 ; :570 [#uses=1] + br i1 %570, label %.critedge7898, label %xPBRK.exit + +.critedge7898: ; preds = %.critedge + br label %xPIF.exit + +xPIF.exit: ; preds = %.critedge7898, %xOperationInitMasks.exit + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 188, i32 1 ; <<4 x float>*>:571 [#uses=0] + load <4 x float>* null ; <<4 x float>>:572 [#uses=0] + shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>>:573 [#uses=0] + icmp eq i32 0, 0 ; :574 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 3, i32 1 ; <<4 x float>*>:575 [#uses=0] + load <4 x float>* %0 ; <<4 x float>>:576 [#uses=0] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; :577 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 0 ; <<4 x float>*>:578 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 1 ; <<4 x float>*>:579 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 2 ; <<4 x float>*>:580 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 2, i32 3 ; <<4 x float>*>:581 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 1, i32 3 ; <<4 x float>*>:582 [#uses=0] + load <4 x float>* null ; <<4 x float>>:583 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 1 ; <<4 x float>*>:584 [#uses=1] + load <4 x float>* %584 ; <<4 x float>>:585 [#uses=1] + load <4 x float>* null ; <<4 x float>>:586 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 0, i32 3 ; <<4 x float>*>:587 [#uses=1] + load <4 x float>* %587 ; <<4 x float>>:588 [#uses=1] + shufflevector <4 x float> %583, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:589 [#uses=1] + shufflevector <4 x float> %585, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:590 [#uses=1] + shufflevector <4 x float> %588, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>>:591 [#uses=1] + mul <4 x float> zeroinitializer, %589 ; <<4 x float>>:592 [#uses=0] + mul <4 x float> zeroinitializer, %590 ; <<4 x float>>:593 [#uses=0] + mul <4 x float> zeroinitializer, zeroinitializer ; <<4 x float>>:594 [#uses=1] + mul <4 x float> zeroinitializer, %591 ; <<4 x float>>:595 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 0 ; <<4 x float>*>:596 [#uses=2] + load <4 x float>* %596 ; <<4 x float>>:597 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %596 + load <4 x float>* null ; <<4 x float>>:598 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:599 [#uses=0] + shufflevector <4 x float> %594, <4 x float> zeroinitializer, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:600 [#uses=0] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 3 ; <<4 x float>*>:601 [#uses=2] + load <4 x float>* %601 ; <<4 x float>>:602 [#uses=0] + store <4 x float> zeroinitializer, <4 x float>* %601 + load <4 x float>* null ; <<4 x float>>:603 [#uses=0] + load <4 x float>* null ; <<4 x float>>:604 [#uses=1] + getelementptr [193 x [4 x <4 x float>]]* null, i32 0, i32 4, i32 2 ; <<4 x float>*>:605 [#uses=1] + load <4 x float>* %605 ; <<4 x float>>:606 [#uses=1] + sub <4 x float> zeroinitializer, %604 ; <<4 x float>>:607 [#uses=2] + sub <4 x float> zeroinitializer, %606 ; <<4 x float>>:608 [#uses=2] + call i32 @llvm.ppc.altivec.vcmpequw.p( i32 0, <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; :609 [#uses=0] + br i1 false, label %617, label %610 + +;