From 47086570973e82fe5ea8ace9637ae73c2469e1da Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Tue, 1 Oct 2013 13:10:16 +0000 Subject: [SystemZ] Allow selects with a high-word destination git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191751 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/SystemZ/asm-18.ll | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'test/CodeGen/SystemZ') diff --git a/test/CodeGen/SystemZ/asm-18.ll b/test/CodeGen/SystemZ/asm-18.ll index e7e171e..6126b50 100644 --- a/test/CodeGen/SystemZ/asm-18.ll +++ b/test/CodeGen/SystemZ/asm-18.ll @@ -287,3 +287,31 @@ define void @f12() { i32 1000000000, i32 400000) ret void } + +; Test selects involving high registers. +define void @f13(i32 %x, i32 %y) { +; CHECK-LABEL: f13: +; CHECK: llihl [[REG:%r[0-5]]], 0 +; CHECK: cije %r2, 0 +; CHECK: iihf [[REG]], 2102030405 +; CHECK: blah [[REG]] +; CHECK: br %r14 + %cmp = icmp eq i32 %x, 0 + %val = select i1 %cmp, i32 0, i32 2102030405 + call void asm sideeffect "blah $0", "h"(i32 %val) + ret void +} + +; Test selects involving low registers. +define void @f14(i32 %x, i32 %y) { +; CHECK-LABEL: f14: +; CHECK: lhi [[REG:%r[0-5]]], 0 +; CHECK: cije %r2, 0 +; CHECK: iilf [[REG]], 2102030405 +; CHECK: blah [[REG]] +; CHECK: br %r14 + %cmp = icmp eq i32 %x, 0 + %val = select i1 %cmp, i32 0, i32 2102030405 + call void asm sideeffect "blah $0", "r"(i32 %val) + ret void +} -- cgit v1.1