From 9f76ed512747fc95400b4963900cd3d316c3182e Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 24 Jun 2009 06:36:07 +0000 Subject: Move thumb and thumb2 tests into separate directories. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll | 16 +++ .../CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll | 27 +++++ test/CodeGen/Thumb/2007-03-06-AddR7.ll | 117 +++++++++++++++++++++ test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll | 41 ++++++++ test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll | 8 ++ test/CodeGen/Thumb/dyn-stackalloc.ll | 59 +++++++++++ test/CodeGen/Thumb/fpconv.ll | 61 +++++++++++ test/CodeGen/Thumb/fpow.ll | 9 ++ test/CodeGen/Thumb/frame_thumb.ll | 9 ++ test/CodeGen/Thumb/iabs.ll | 17 +++ test/CodeGen/Thumb/inlineasm-imm-thumb.ll | 43 ++++++++ test/CodeGen/Thumb/ispositive.ll | 9 ++ test/CodeGen/Thumb/large-stack.ll | 20 ++++ test/CodeGen/Thumb/ldr_ext.ll | 28 +++++ test/CodeGen/Thumb/ldr_frame.ll | 31 ++++++ test/CodeGen/Thumb/long-setcc.ll | 17 +++ test/CodeGen/Thumb/long.ll | 76 +++++++++++++ test/CodeGen/Thumb/select.ll | 55 ++++++++++ test/CodeGen/Thumb/stack-frame.ll | 13 +++ test/CodeGen/Thumb/thumb-imm.ll | 10 ++ test/CodeGen/Thumb/tst_teq.ll | 17 +++ test/CodeGen/Thumb/unord.ll | 14 +++ test/CodeGen/Thumb/vargs.ll | 36 +++++++ 23 files changed, 733 insertions(+) create mode 100644 test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll create mode 100644 test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll create mode 100644 test/CodeGen/Thumb/2007-03-06-AddR7.ll create mode 100644 test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll create mode 100644 test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll create mode 100644 test/CodeGen/Thumb/dyn-stackalloc.ll create mode 100644 test/CodeGen/Thumb/fpconv.ll create mode 100644 test/CodeGen/Thumb/fpow.ll create mode 100644 test/CodeGen/Thumb/frame_thumb.ll create mode 100644 test/CodeGen/Thumb/iabs.ll create mode 100644 test/CodeGen/Thumb/inlineasm-imm-thumb.ll create mode 100644 test/CodeGen/Thumb/ispositive.ll create mode 100644 test/CodeGen/Thumb/large-stack.ll create mode 100644 test/CodeGen/Thumb/ldr_ext.ll create mode 100644 test/CodeGen/Thumb/ldr_frame.ll create mode 100644 test/CodeGen/Thumb/long-setcc.ll create mode 100644 test/CodeGen/Thumb/long.ll create mode 100644 test/CodeGen/Thumb/select.ll create mode 100644 test/CodeGen/Thumb/stack-frame.ll create mode 100644 test/CodeGen/Thumb/thumb-imm.ll create mode 100644 test/CodeGen/Thumb/tst_teq.ll create mode 100644 test/CodeGen/Thumb/unord.ll create mode 100644 test/CodeGen/Thumb/vargs.ll (limited to 'test/CodeGen/Thumb') diff --git a/test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll b/test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll new file mode 100644 index 0000000..19c156d --- /dev/null +++ b/test/CodeGen/Thumb/2007-01-31-RegInfoAssert.ll @@ -0,0 +1,16 @@ +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin + +%struct.rtx_def = type { i8 } +@str = external global [7 x i8] + +define void @f1() { + %D = alloca %struct.rtx_def, align 1 + %tmp1 = bitcast %struct.rtx_def* %D to i32* + %tmp7 = load i32* %tmp1 + %tmp14 = lshr i32 %tmp7, 1 + %tmp1415 = and i32 %tmp14, 1 + call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 ) + ret void +} + +declare void @printf(i32, ...) diff --git a/test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll b/test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll new file mode 100644 index 0000000..ee52cf0 --- /dev/null +++ b/test/CodeGen/Thumb/2007-02-02-JoinIntervalsCrash.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin + + %struct.color_sample = type { i32 } + %struct.ref = type { %struct.color_sample, i16, i16 } + +define void @zcvrs() { + br i1 false, label %bb22, label %UnifiedReturnBlock + +bb22: + br i1 false, label %bb64, label %UnifiedReturnBlock + +bb64: + %tmp67 = urem i32 0, 0 + %tmp69 = icmp slt i32 %tmp67, 10 + %iftmp.13.0 = select i1 %tmp69, i8 48, i8 55 + %tmp75 = add i8 %iftmp.13.0, 0 + store i8 %tmp75, i8* null + %tmp81 = udiv i32 0, 0 + %tmp83 = icmp eq i32 %tmp81, 0 + br i1 %tmp83, label %bb85, label %bb64 + +bb85: + ret void + +UnifiedReturnBlock: + ret void +} diff --git a/test/CodeGen/Thumb/2007-03-06-AddR7.ll b/test/CodeGen/Thumb/2007-03-06-AddR7.ll new file mode 100644 index 0000000..ad3e195 --- /dev/null +++ b/test/CodeGen/Thumb/2007-03-06-AddR7.ll @@ -0,0 +1,117 @@ +; RUN: llvm-as < %s | llc -march=thumb +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin -relocation-model=pic \ +; RUN: -mattr=+v6,+vfp2 | not grep {add r., r7, #2 \\* 4} + + %struct.__fooAllocator = type opaque + %struct.__fooY = type { %struct.fooXBase, %struct.__fooString*, %struct.__fooU*, %struct.__fooV*, i8** } + %struct.__fooZ = type opaque + %struct.__fooU = type opaque + %struct.__fooString = type opaque + %struct.__fooV = type opaque + %struct.fooXBase = type { i32, [4 x i8] } + %struct.fooXClass = type { i32, i8*, void (i8*)*, i8* (%struct.__fooAllocator*, i8*)*, void (i8*)*, i8 (i8*, i8*) zeroext *, i32 (i8*)*, %struct.__fooString* (i8*, %struct.__fooZ*)*, %struct.__fooString* (i8*)* } + %struct.aa_cache = type { i32, i32, [1 x %struct.aa_method*] } + %struct.aa_class = type { %struct.aa_class*, %struct.aa_class*, i8*, i32, i32, i32, %struct.aa_ivar_list*, %struct.aa_method_list**, %struct.aa_cache*, %struct.aa_protocol_list* } + %struct.aa_ivar = type { i8*, i8*, i32 } + %struct.aa_ivar_list = type { i32, [1 x %struct.aa_ivar] } + %struct.aa_method = type { %struct.aa_ss*, i8*, %struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* } + %struct.aa_method_list = type { %struct.aa_method_list*, i32, [1 x %struct.aa_method] } + %struct.aa_object = type { %struct.aa_class* } + %struct.aa_protocol_list = type { %struct.aa_protocol_list*, i32, [1 x %struct.aa_object*] } + %struct.aa_ss = type opaque +@__kfooYTypeID = external global i32 ; [#uses=3] +@__fooYClass = external constant %struct.fooXClass ; <%struct.fooXClass*> [#uses=1] +@__fooXClassTableSize = external global i32 ; [#uses=1] +@__fooXAaClassTable = external global i32* ; [#uses=1] +@s.10319 = external global %struct.aa_ss* ; <%struct.aa_ss**> [#uses=2] +@str15 = external constant [24 x i8] ; <[24 x i8]*> [#uses=1] + + +define i8 @test(%struct.__fooY* %calendar, double* %atp, i8* %componentDesc, ...) zeroext { +entry: + %args = alloca i8*, align 4 ; [#uses=5] + %args4 = bitcast i8** %args to i8* ; [#uses=2] + call void @llvm.va_start( i8* %args4 ) + %tmp6 = load i32* @__kfooYTypeID ; [#uses=1] + icmp eq i32 %tmp6, 0 ; :0 [#uses=1] + br i1 %0, label %cond_true, label %cond_next + +cond_true: ; preds = %entry + %tmp7 = call i32 @_fooXRegisterClass( %struct.fooXClass* @__fooYClass ) ; [#uses=1] + store i32 %tmp7, i32* @__kfooYTypeID + br label %cond_next + +cond_next: ; preds = %cond_true, %entry + %tmp8 = load i32* @__kfooYTypeID ; [#uses=2] + %tmp15 = load i32* @__fooXClassTableSize ; [#uses=1] + icmp ugt i32 %tmp15, %tmp8 ; :1 [#uses=1] + br i1 %1, label %cond_next18, label %cond_true58 + +cond_next18: ; preds = %cond_next + %tmp21 = getelementptr %struct.__fooY* %calendar, i32 0, i32 0, i32 0 ; [#uses=1] + %tmp22 = load i32* %tmp21 ; [#uses=2] + %tmp29 = load i32** @__fooXAaClassTable ; [#uses=1] + %tmp31 = getelementptr i32* %tmp29, i32 %tmp8 ; [#uses=1] + %tmp32 = load i32* %tmp31 ; [#uses=1] + icmp eq i32 %tmp22, %tmp32 ; :2 [#uses=1] + %.not = xor i1 %2, true ; [#uses=1] + icmp ugt i32 %tmp22, 4095 ; :3 [#uses=1] + %bothcond = and i1 %.not, %3 ; [#uses=1] + br i1 %bothcond, label %cond_true58, label %bb48 + +bb48: ; preds = %cond_next18 + %tmp78 = call i32 @strlen( i8* %componentDesc ) ; [#uses=4] + %tmp92 = alloca i32, i32 %tmp78 ; [#uses=2] + icmp sgt i32 %tmp78, 0 ; :4 [#uses=1] + br i1 %4, label %cond_true111, label %bb114 + +cond_true58: ; preds = %cond_next18, %cond_next + %tmp59 = load %struct.aa_ss** @s.10319 ; <%struct.aa_ss*> [#uses=2] + icmp eq %struct.aa_ss* %tmp59, null ; :5 [#uses=1] + %tmp6869 = bitcast %struct.__fooY* %calendar to i8* ; [#uses=2] + br i1 %5, label %cond_true60, label %cond_next64 + +cond_true60: ; preds = %cond_true58 + %tmp63 = call %struct.aa_ss* @sel_registerName( i8* getelementptr ([24 x i8]* @str15, i32 0, i32 0) ) ; <%struct.aa_ss*> [#uses=2] + store %struct.aa_ss* %tmp63, %struct.aa_ss** @s.10319 + %tmp66137 = volatile load i8** %args ; [#uses=1] + %tmp73138 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp63, double* %atp, i8* %componentDesc, i8* %tmp66137) zeroext ; [#uses=1] + ret i8 %tmp73138 + +cond_next64: ; preds = %cond_true58 + %tmp66 = volatile load i8** %args ; [#uses=1] + %tmp73 = call i8 (i8*, %struct.aa_ss*, ...) zeroext * bitcast (%struct.aa_object* (%struct.aa_object*, %struct.aa_ss*, ...)* @aa_mm to i8 (i8*, %struct.aa_ss*, ...) zeroext *)( i8* %tmp6869, %struct.aa_ss* %tmp59, double* %atp, i8* %componentDesc, i8* %tmp66 ) zeroext ; [#uses=1] + ret i8 %tmp73 + +cond_true111: ; preds = %cond_true111, %bb48 + %idx.2132.0 = phi i32 [ 0, %bb48 ], [ %indvar.next, %cond_true111 ] ; [#uses=2] + %tmp95 = volatile load i8** %args ; [#uses=2] + %tmp97 = getelementptr i8* %tmp95, i32 4 ; [#uses=1] + volatile store i8* %tmp97, i8** %args + %tmp9899 = bitcast i8* %tmp95 to i32* ; [#uses=1] + %tmp100 = load i32* %tmp9899 ; [#uses=1] + %tmp104 = getelementptr i32* %tmp92, i32 %idx.2132.0 ; [#uses=1] + store i32 %tmp100, i32* %tmp104 + %indvar.next = add i32 %idx.2132.0, 1 ; [#uses=2] + icmp eq i32 %indvar.next, %tmp78 ; :6 [#uses=1] + br i1 %6, label %bb114, label %cond_true111 + +bb114: ; preds = %cond_true111, %bb48 + call void @llvm.va_end( i8* %args4 ) + %tmp122 = call i8 @_fooYCCV( %struct.__fooY* %calendar, double* %atp, i8* %componentDesc, i32* %tmp92, i32 %tmp78 ) zeroext ; [#uses=1] + ret i8 %tmp122 +} + +declare i32 @_fooXRegisterClass(%struct.fooXClass*) + +declare i8 @_fooYCCV(%struct.__fooY*, double*, i8*, i32*, i32) zeroext + +declare %struct.aa_object* @aa_mm(%struct.aa_object*, %struct.aa_ss*, ...) + +declare %struct.aa_ss* @sel_registerName(i8*) + +declare void @llvm.va_start(i8*) + +declare i32 @strlen(i8*) + +declare void @llvm.va_end(i8*) diff --git a/test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll b/test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll new file mode 100644 index 0000000..159be4e --- /dev/null +++ b/test/CodeGen/Thumb/2007-05-05-InvalidPushPop.ll @@ -0,0 +1,41 @@ +; RUN: llvm-as < %s | llc | not grep r11 + +target triple = "thumb-linux-gnueabi" + %struct.__sched_param = type { i32 } + %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 } +@i.1882 = internal global i32 1 ; [#uses=2] +@.str = internal constant [14 x i8] c"Thread 1: %d\0A\00" ; <[14 x i8]*> [#uses=1] +@.str1 = internal constant [14 x i8] c"Thread 2: %d\0A\00" ; <[14 x i8]*> [#uses=1] + +define i8* @f(i8* %a) { +entry: + %tmp1 = load i32* @i.1882 ; [#uses=1] + %tmp2 = add i32 %tmp1, 1 ; [#uses=2] + store i32 %tmp2, i32* @i.1882 + %tmp34 = inttoptr i32 %tmp2 to i8* ; [#uses=1] + ret i8* %tmp34 +} + +define i32 @main() { +entry: + %t = alloca i32, align 4 ; [#uses=4] + %ret = alloca i32, align 4 ; [#uses=3] + %tmp1 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; [#uses=0] + %tmp2 = load i32* %t ; [#uses=1] + %ret3 = bitcast i32* %ret to i8** ; [#uses=2] + %tmp4 = call i32 @pthread_join( i32 %tmp2, i8** %ret3 ) ; [#uses=0] + %tmp5 = load i32* %ret ; [#uses=1] + %tmp7 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str, i32 0, i32 0), i32 %tmp5 ) ; [#uses=0] + %tmp8 = call i32 @pthread_create( i32* %t, %struct.pthread_attr_t* null, i8* (i8*)* @f, i8* null ) ; [#uses=0] + %tmp9 = load i32* %t ; [#uses=1] + %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; [#uses=0] + %tmp12 = load i32* %ret ; [#uses=1] + %tmp14 = call i32 (i8*, ...)* @printf( i8* getelementptr ([14 x i8]* @.str1, i32 0, i32 0), i32 %tmp12 ) ; [#uses=0] + ret i32 0 +} + +declare i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*) + +declare i32 @pthread_join(i32, i8**) + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll b/test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll new file mode 100644 index 0000000..9b2aba9 --- /dev/null +++ b/test/CodeGen/Thumb/2009-06-18-ThumbCommuteMul.ll @@ -0,0 +1,8 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep r0 | count 1 + +define i32 @a(i32 %x, i32 %y) nounwind readnone { +entry: + %mul = mul i32 %y, %x ; [#uses=1] + ret i32 %mul +} + diff --git a/test/CodeGen/Thumb/dyn-stackalloc.ll b/test/CodeGen/Thumb/dyn-stackalloc.ll new file mode 100644 index 0000000..cd76250 --- /dev/null +++ b/test/CodeGen/Thumb/dyn-stackalloc.ll @@ -0,0 +1,59 @@ +; RUN: llvm-as < %s | llc -march=thumb | not grep {ldr sp} +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin | \ +; RUN: not grep {sub.*r7} +; RUN: llvm-as < %s | llc -march=thumb | grep 4294967280 + + %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } + %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } + +define void @t1(%struct.state* %v) { + %tmp6 = load i32* null + %tmp8 = alloca float, i32 %tmp6 + store i32 1, i32* null + br i1 false, label %bb123.preheader, label %return + +bb123.preheader: + br i1 false, label %bb43, label %return + +bb43: + call fastcc void @f1( float* %tmp8, float* null, i32 0 ) + %tmp70 = load i32* null + %tmp85 = getelementptr float* %tmp8, i32 0 + call fastcc void @f2( float* null, float* null, float* %tmp85, i32 %tmp70 ) + ret void + +return: + ret void +} + +declare fastcc void @f1(float*, float*, i32) + +declare fastcc void @f2(float*, float*, float*, i32) + + %struct.comment = type { i8**, i32*, i32, i8* } +@str215 = external global [2 x i8] + +define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { + %tmp1 = call i32 @strlen( i8* %tag ) + %tmp3 = call i32 @strlen( i8* %contents ) + %tmp4 = add i32 %tmp1, 2 + %tmp5 = add i32 %tmp4, %tmp3 + %tmp6 = alloca i8, i32 %tmp5 + %tmp9 = call i8* @strcpy( i8* %tmp6, i8* %tag ) + %tmp6.len = call i32 @strlen( i8* %tmp6 ) + %tmp6.indexed = getelementptr i8* %tmp6, i32 %tmp6.len + call void @llvm.memcpy.i32( i8* %tmp6.indexed, i8* getelementptr ([2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1 ) + %tmp15 = call i8* @strcat( i8* %tmp6, i8* %contents ) + call fastcc void @comment_add( %struct.comment* %vc, i8* %tmp6 ) + ret void +} + +declare i32 @strlen(i8*) + +declare i8* @strcat(i8*, i8*) + +declare fastcc void @comment_add(%struct.comment*, i8*) + +declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) + +declare i8* @strcpy(i8*, i8*) diff --git a/test/CodeGen/Thumb/fpconv.ll b/test/CodeGen/Thumb/fpconv.ll new file mode 100644 index 0000000..2003131 --- /dev/null +++ b/test/CodeGen/Thumb/fpconv.ll @@ -0,0 +1,61 @@ +; RUN: llvm-as < %s | llc -march=thumb + +define float @f1(double %x) { +entry: + %tmp1 = fptrunc double %x to float ; [#uses=1] + ret float %tmp1 +} + +define double @f2(float %x) { +entry: + %tmp1 = fpext float %x to double ; [#uses=1] + ret double %tmp1 +} + +define i32 @f3(float %x) { +entry: + %tmp = fptosi float %x to i32 ; [#uses=1] + ret i32 %tmp +} + +define i32 @f4(float %x) { +entry: + %tmp = fptoui float %x to i32 ; [#uses=1] + ret i32 %tmp +} + +define i32 @f5(double %x) { +entry: + %tmp = fptosi double %x to i32 ; [#uses=1] + ret i32 %tmp +} + +define i32 @f6(double %x) { +entry: + %tmp = fptoui double %x to i32 ; [#uses=1] + ret i32 %tmp +} + +define float @f7(i32 %a) { +entry: + %tmp = sitofp i32 %a to float ; [#uses=1] + ret float %tmp +} + +define double @f8(i32 %a) { +entry: + %tmp = sitofp i32 %a to double ; [#uses=1] + ret double %tmp +} + +define float @f9(i32 %a) { +entry: + %tmp = uitofp i32 %a to float ; [#uses=1] + ret float %tmp +} + +define double @f10(i32 %a) { +entry: + %tmp = uitofp i32 %a to double ; [#uses=1] + ret double %tmp +} diff --git a/test/CodeGen/Thumb/fpow.ll b/test/CodeGen/Thumb/fpow.ll new file mode 100644 index 0000000..e5b92ad --- /dev/null +++ b/test/CodeGen/Thumb/fpow.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=thumb + +define double @t(double %x, double %y) nounwind optsize { +entry: + %0 = tail call double @llvm.pow.f64( double %x, double %y ) ; [#uses=1] + ret double %0 +} + +declare double @llvm.pow.f64(double, double) nounwind readonly diff --git a/test/CodeGen/Thumb/frame_thumb.ll b/test/CodeGen/Thumb/frame_thumb.ll new file mode 100644 index 0000000..270e331 --- /dev/null +++ b/test/CodeGen/Thumb/frame_thumb.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin \ +; RUN: -disable-fp-elim | not grep {r11} +; RUN: llvm-as < %s | llc -mtriple=thumb-linux-gnueabi \ +; RUN: -disable-fp-elim | not grep {r11} + +define i32 @f() { +entry: + ret i32 10 +} diff --git a/test/CodeGen/Thumb/iabs.ll b/test/CodeGen/Thumb/iabs.ll new file mode 100644 index 0000000..13084f6 --- /dev/null +++ b/test/CodeGen/Thumb/iabs.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=thumb -stats |& \ +; RUN: grep {4 .*Number of machine instrs printed} + +;; Integer absolute value, should produce something as good as: +;; Thumb: +;; asr r2, r0, #31 +;; add r0, r0, r2 +;; eor r0, r2 +;; bx lr + +define i32 @test(i32 %a) { + %tmp1neg = sub i32 0, %a + %b = icmp sgt i32 %a, -1 + %abs = select i1 %b, i32 %a, i32 %tmp1neg + ret i32 %abs +} + diff --git a/test/CodeGen/Thumb/inlineasm-imm-thumb.ll b/test/CodeGen/Thumb/inlineasm-imm-thumb.ll new file mode 100644 index 0000000..2c872e7 --- /dev/null +++ b/test/CodeGen/Thumb/inlineasm-imm-thumb.ll @@ -0,0 +1,43 @@ +; RUN: llvm-as < %s | llc -march=thumb + +; Test Thumb-mode "I" constraint, for ADD immediate. +define i32 @testI(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,I"( i32 %x, i32 255 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "J" constraint, for negated ADD immediates. +define void @testJ() { + tail call void asm sideeffect ".word $0", "J"( i32 -255 ) nounwind + ret void +} + +; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use. +define void @testK() { + tail call void asm sideeffect ".word $0", "K"( i32 65280 ) nounwind + ret void +} + +; Test Thumb-mode "L" constraint, for 3-operand ADD immediates. +define i32 @testL(i32 %x) { + %y = call i32 asm "add $0, $1, $2", "=r,r,L"( i32 %x, i32 -7 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "M" constraint, for "ADD r = sp + imm". +define i32 @testM() { + %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "N" constraint, for values between 0 and 31. +define i32 @testN(i32 %x) { + %y = call i32 asm "lsl $0, $1, $2", "=r,r,N"( i32 %x, i32 31 ) nounwind + ret i32 %y +} + +; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm". +define void @testO() { + tail call void asm sideeffect "add sp, sp, $0; add sp, sp, $1", "O,O"( i32 -508, i32 508 ) nounwind + ret void +} diff --git a/test/CodeGen/Thumb/ispositive.ll b/test/CodeGen/Thumb/ispositive.ll new file mode 100644 index 0000000..91f5970 --- /dev/null +++ b/test/CodeGen/Thumb/ispositive.ll @@ -0,0 +1,9 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep {lsr r0, r0, #31} + +define i32 @test1(i32 %X) { +entry: + icmp slt i32 %X, 0 ; :0 [#uses=1] + zext i1 %0 to i32 ; :1 [#uses=1] + ret i32 %1 +} + diff --git a/test/CodeGen/Thumb/large-stack.ll b/test/CodeGen/Thumb/large-stack.ll new file mode 100644 index 0000000..f7c9ed0 --- /dev/null +++ b/test/CodeGen/Thumb/large-stack.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep {ldr.*LCP} | count 5 + +define void @test1() { + %tmp = alloca [ 64 x i32 ] , align 4 + ret void +} + +define void @test2() { + %tmp = alloca [ 4168 x i8 ] , align 4 + ret void +} + +define i32 @test3() { + %retval = alloca i32, align 4 + %tmp = alloca i32, align 4 + %a = alloca [805306369 x i8], align 16 + store i32 0, i32* %tmp + %tmp1 = load i32* %tmp + ret i32 %tmp1 +} diff --git a/test/CodeGen/Thumb/ldr_ext.ll b/test/CodeGen/Thumb/ldr_ext.ll new file mode 100644 index 0000000..4b2a7b2 --- /dev/null +++ b/test/CodeGen/Thumb/ldr_ext.ll @@ -0,0 +1,28 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep ldrb | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrh | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrsb | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep ldrsh | count 1 + +define i32 @test1(i8* %v.pntr.s0.u1) { + %tmp.u = load i8* %v.pntr.s0.u1 + %tmp1.s = zext i8 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test2(i16* %v.pntr.s0.u1) { + %tmp.u = load i16* %v.pntr.s0.u1 + %tmp1.s = zext i16 %tmp.u to i32 + ret i32 %tmp1.s +} + +define i32 @test3(i8* %v.pntr.s1.u0) { + %tmp.s = load i8* %v.pntr.s1.u0 + %tmp1.s = sext i8 %tmp.s to i32 + ret i32 %tmp1.s +} + +define i32 @test4() { + %tmp.s = load i16* null + %tmp1.s = sext i16 %tmp.s to i32 + ret i32 %tmp1.s +} diff --git a/test/CodeGen/Thumb/ldr_frame.ll b/test/CodeGen/Thumb/ldr_frame.ll new file mode 100644 index 0000000..0043fb5 --- /dev/null +++ b/test/CodeGen/Thumb/ldr_frame.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep cpy | count 2 + +define i32 @f1() { + %buf = alloca [32 x i32], align 4 + %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 0 + %tmp1 = load i32* %tmp + ret i32 %tmp1 +} + +define i32 @f2() { + %buf = alloca [32 x i8], align 4 + %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 0 + %tmp1 = load i8* %tmp + %tmp2 = zext i8 %tmp1 to i32 + ret i32 %tmp2 +} + +define i32 @f3() { + %buf = alloca [32 x i32], align 4 + %tmp = getelementptr [32 x i32]* %buf, i32 0, i32 32 + %tmp1 = load i32* %tmp + ret i32 %tmp1 +} + +define i32 @f4() { + %buf = alloca [32 x i8], align 4 + %tmp = getelementptr [32 x i8]* %buf, i32 0, i32 2 + %tmp1 = load i8* %tmp + %tmp2 = zext i8 %tmp1 to i32 + ret i32 %tmp2 +} diff --git a/test/CodeGen/Thumb/long-setcc.ll b/test/CodeGen/Thumb/long-setcc.ll new file mode 100644 index 0000000..df6d137 --- /dev/null +++ b/test/CodeGen/Thumb/long-setcc.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep cmp | count 1 + + +define i1 @t1(i64 %x) { + %B = icmp slt i64 %x, 0 + ret i1 %B +} + +define i1 @t2(i64 %x) { + %tmp = icmp ult i64 %x, 4294967296 + ret i1 %tmp +} + +define i1 @t3(i32 %x) { + %tmp = icmp ugt i32 %x, -1 + ret i1 %tmp +} diff --git a/test/CodeGen/Thumb/long.ll b/test/CodeGen/Thumb/long.ll new file mode 100644 index 0000000..2287443 --- /dev/null +++ b/test/CodeGen/Thumb/long.ll @@ -0,0 +1,76 @@ +; RUN: llvm-as < %s | llc -march=thumb | \ +; RUN: grep mvn | count 1 +; RUN: llvm-as < %s | llc -march=thumb | \ +; RUN: grep adc | count 1 +; RUN: llvm-as < %s | llc -march=thumb | \ +; RUN: grep sbc | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep __muldi3 + +define i64 @f1() { +entry: + ret i64 0 +} + +define i64 @f2() { +entry: + ret i64 1 +} + +define i64 @f3() { +entry: + ret i64 2147483647 +} + +define i64 @f4() { +entry: + ret i64 2147483648 +} + +define i64 @f5() { +entry: + ret i64 9223372036854775807 +} + +define i64 @f6(i64 %x, i64 %y) { +entry: + %tmp1 = add i64 %y, 1 ; [#uses=1] + ret i64 %tmp1 +} + +define void @f7() { +entry: + %tmp = call i64 @f8( ) ; [#uses=0] + ret void +} + +declare i64 @f8() + +define i64 @f9(i64 %a, i64 %b) { +entry: + %tmp = sub i64 %a, %b ; [#uses=1] + ret i64 %tmp +} + +define i64 @f(i32 %a, i32 %b) { +entry: + %tmp = sext i32 %a to i64 ; [#uses=1] + %tmp1 = sext i32 %b to i64 ; [#uses=1] + %tmp2 = mul i64 %tmp1, %tmp ; [#uses=1] + ret i64 %tmp2 +} + +define i64 @g(i32 %a, i32 %b) { +entry: + %tmp = zext i32 %a to i64 ; [#uses=1] + %tmp1 = zext i32 %b to i64 ; [#uses=1] + %tmp2 = mul i64 %tmp1, %tmp ; [#uses=1] + ret i64 %tmp2 +} + +define i64 @f10() { +entry: + %a = alloca i64, align 8 ; [#uses=1] + %retval = load i64* %a ; [#uses=1] + ret i64 %retval +} + diff --git a/test/CodeGen/Thumb/select.ll b/test/CodeGen/Thumb/select.ll new file mode 100644 index 0000000..ae75549 --- /dev/null +++ b/test/CodeGen/Thumb/select.ll @@ -0,0 +1,55 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bgt | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep blt | count 3 +; RUN: llvm-as < %s | llc -march=thumb | grep ble | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bls | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep bhi | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep __ltdf2 + +define i32 @f1(i32 %a.s) { +entry: + %tmp = icmp eq i32 %a.s, 4 + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f2(i32 %a.s) { +entry: + %tmp = icmp sgt i32 %a.s, 4 + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f3(i32 %a.s, i32 %b.s) { +entry: + %tmp = icmp slt i32 %a.s, %b.s + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f4(i32 %a.s, i32 %b.s) { +entry: + %tmp = icmp sle i32 %a.s, %b.s + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f5(i32 %a.u, i32 %b.u) { +entry: + %tmp = icmp ule i32 %a.u, %b.u + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define i32 @f6(i32 %a.u, i32 %b.u) { +entry: + %tmp = icmp ugt i32 %a.u, %b.u + %tmp1.s = select i1 %tmp, i32 2, i32 3 + ret i32 %tmp1.s +} + +define double @f7(double %a, double %b) { + %tmp = fcmp olt double %a, 1.234e+00 + %tmp1 = select i1 %tmp, double -1.000e+00, double %b + ret double %tmp1 +} diff --git a/test/CodeGen/Thumb/stack-frame.ll b/test/CodeGen/Thumb/stack-frame.ll new file mode 100644 index 0000000..756d257 --- /dev/null +++ b/test/CodeGen/Thumb/stack-frame.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=thumb +; RUN: llvm-as < %s | llc -march=thumb | grep add | count 1 + +define void @f1() { + %c = alloca i8, align 1 + ret void +} + +define i32 @f2() { + ret i32 1 +} + + diff --git a/test/CodeGen/Thumb/thumb-imm.ll b/test/CodeGen/Thumb/thumb-imm.ll new file mode 100644 index 0000000..2be393a --- /dev/null +++ b/test/CodeGen/Thumb/thumb-imm.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=thumb | not grep CPI + + +define i32 @test1() { + ret i32 1000 +} + +define i32 @test2() { + ret i32 -256 +} diff --git a/test/CodeGen/Thumb/tst_teq.ll b/test/CodeGen/Thumb/tst_teq.ll new file mode 100644 index 0000000..0456951 --- /dev/null +++ b/test/CodeGen/Thumb/tst_teq.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep tst + +define i32 @f(i32 %a) { +entry: + %tmp2 = and i32 %a, 255 ; [#uses=1] + icmp eq i32 %tmp2, 0 ; :0 [#uses=1] + %retval = select i1 %0, i32 20, i32 10 ; [#uses=1] + ret i32 %retval +} + +define i32 @g(i32 %a) { +entry: + %tmp2 = xor i32 %a, 255 + icmp eq i32 %tmp2, 0 ; :0 [#uses=1] + %retval = select i1 %0, i32 20, i32 10 ; [#uses=1] + ret i32 %retval +} diff --git a/test/CodeGen/Thumb/unord.ll b/test/CodeGen/Thumb/unord.ll new file mode 100644 index 0000000..4202d26 --- /dev/null +++ b/test/CodeGen/Thumb/unord.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=thumb | grep bne | count 1 +; RUN: llvm-as < %s | llc -march=thumb | grep beq | count 1 + +define i32 @f1(float %X, float %Y) { + %tmp = fcmp uno float %X, %Y + %retval = select i1 %tmp, i32 1, i32 -1 + ret i32 %retval +} + +define i32 @f2(float %X, float %Y) { + %tmp = fcmp ord float %X, %Y + %retval = select i1 %tmp, i32 1, i32 -1 + ret i32 %retval +} diff --git a/test/CodeGen/Thumb/vargs.ll b/test/CodeGen/Thumb/vargs.ll new file mode 100644 index 0000000..a18010f --- /dev/null +++ b/test/CodeGen/Thumb/vargs.ll @@ -0,0 +1,36 @@ +; RUN: llvm-as < %s | llc -march=thumb +; RUN: llvm-as < %s | llc -mtriple=thumb-linux | grep pop | count 1 +; RUN: llvm-as < %s | llc -mtriple=thumb-darwin | grep pop | count 2 + +@str = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] + +define void @f(i32 %a, ...) { +entry: + %va = alloca i8*, align 4 ; [#uses=4] + %va.upgrd.1 = bitcast i8** %va to i8* ; [#uses=1] + call void @llvm.va_start( i8* %va.upgrd.1 ) + br label %bb + +bb: ; preds = %bb, %entry + %a_addr.0 = phi i32 [ %a, %entry ], [ %tmp5, %bb ] ; [#uses=2] + %tmp = volatile load i8** %va ; [#uses=2] + %tmp2 = getelementptr i8* %tmp, i32 4 ; [#uses=1] + volatile store i8* %tmp2, i8** %va + %tmp5 = add i32 %a_addr.0, -1 ; [#uses=1] + %tmp.upgrd.2 = icmp eq i32 %a_addr.0, 1 ; [#uses=1] + br i1 %tmp.upgrd.2, label %bb7, label %bb + +bb7: ; preds = %bb + %tmp3 = bitcast i8* %tmp to i32* ; [#uses=1] + %tmp.upgrd.3 = load i32* %tmp3 ; [#uses=1] + %tmp10 = call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @str, i32 0, i64 0), i32 %tmp.upgrd.3 ) ; [#uses=0] + %va.upgrd.4 = bitcast i8** %va to i8* ; [#uses=1] + call void @llvm.va_end( i8* %va.upgrd.4 ) + ret void +} + +declare void @llvm.va_start(i8*) + +declare i32 @printf(i8*, ...) + +declare void @llvm.va_end(i8*) -- cgit v1.1