From 4b0345be3071a5612023588eef689b93f3e94fa4 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Mon, 11 Jan 2010 17:03:47 +0000 Subject: Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93152 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll') diff --git a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll index 8a0b244..3cd5416 100644 --- a/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll +++ b/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll @@ -1,12 +1,18 @@ -; RUN: llc < %s | grep -E {sar|shl|mov|or} | count 4 +; RUN: llc < %s | FileCheck %s + ; Check that the shr(shl X, 56), 48) is not mistakenly turned into ; a shr (X, -8) that gets subsequently "optimized away" as undef ; PR4254 + target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" define i64 @foo(i64 %b) nounwind readnone { entry: +; CHECK: foo: +; CHECK: shlq $56, %rdi +; CHECK: sarq $48, %rdi +; CHECK: leaq 1(%rdi), %rax %shl = shl i64 %b, 56 ; [#uses=1] %shr = ashr i64 %shl, 48 ; [#uses=1] %add5 = or i64 %shr, 1 ; [#uses=1] -- cgit v1.1