From def390a30aa8c3eb94796a062b161762330fdbe4 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Mon, 3 Aug 2009 02:45:34 +0000 Subject: Use movq to move 64 bits in and out of mmx registers. Fixes PR4669 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77940 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll (limited to 'test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll') diff --git a/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll new file mode 100644 index 0000000..083538a --- /dev/null +++ b/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86-64 +; PR4669 +declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32) + +define <1 x i64> @test(i64 %t) { +entry: + %t1 = insertelement <1 x i64> undef, i64 %t, i32 0 + %t2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %t1, i32 48) + ret <1 x i64> %t2 +} -- cgit v1.1