From 7e073baedb8232b9519dbe15ea141ff98ccfe6ae Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 9 Apr 2008 20:57:25 +0000 Subject: - More aggressively coalescing away copies whose source is defined by an implicit_def. - Added insert_subreg coalescing support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49448 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/ins_subreg_coalesce-1.ll | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 test/CodeGen/X86/ins_subreg_coalesce-1.ll (limited to 'test/CodeGen/X86/ins_subreg_coalesce-1.ll') diff --git a/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/test/CodeGen/X86/ins_subreg_coalesce-1.ll new file mode 100644 index 0000000..863cda9 --- /dev/null +++ b/test/CodeGen/X86/ins_subreg_coalesce-1.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 2 + +define fastcc i32 @sqlite3ExprResolveNames() nounwind { +entry: + br i1 false, label %UnifiedReturnBlock, label %bb4 +bb4: ; preds = %entry + br i1 false, label %bb17, label %bb22 +bb17: ; preds = %bb4 + ret i32 1 +bb22: ; preds = %bb4 + br i1 true, label %walkExprTree.exit, label %bb4.i +bb4.i: ; preds = %bb22 + ret i32 0 +walkExprTree.exit: ; preds = %bb22 + %tmp83 = load i16* null, align 4 ; [#uses=1] + %tmp84 = or i16 %tmp83, 2 ; [#uses=2] + store i16 %tmp84, i16* null, align 4 + %tmp98993 = zext i16 %tmp84 to i32 ; [#uses=1] + %tmp1004 = lshr i32 %tmp98993, 3 ; [#uses=1] + %tmp100.lobit5 = and i32 %tmp1004, 1 ; [#uses=1] + ret i32 %tmp100.lobit5 +UnifiedReturnBlock: ; preds = %entry + ret i32 0 +} -- cgit v1.1